We are interfacing ADS5407 ADC with Xilinx FPGA. we have a design doubt regarding the SPI control signals. Is it required of any pull up / pull down for SDO, SDENB, SDIO signals?
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SVJS,
All of the SPI signals have weak 50K Ohm internal pull-down resistors. The Xilinx FPGA should be able to drive these without any external pull-up resistors. You may want to check the drive capability of the pins but I think you will be fine.
Regards,
Jim