AMC60804: Calibration process

Hey Shawn, it is recommended that you run a calibration before starting the first conversion, although subsequent conversions do not need to be pre-calibrated. It looks like your sequence does run the channels at start-up and should be sufficient, although I will confirm on this and post a follow up.

Also the AMC60804 does not support calibration for IDAC voltage sense

Hope this helps! Will get back to you with further details on the first question ASAP

Best regards,

Anshuman

Hi Anshuman

My customer reported that the ADC sample value is not correct if no calibration command, the detail of this problem is stated below, and could you help give your comments to this problem? Is it required to add calibration command for every cycle? 

Stage#1

After power up, ADC is configured to direct mode, ADC_CCS_IDS_n register is default value and ADC_CCS_CFG is configurated to 0x0101, then set ADC_TRIG to start the conversion, and wait for the ADC_BUSY signal, and finally readback GEN_STATUS.

Stage#2

ADC_CCS_CFG is configurated to 0x0202 and then repeat the operation in stage#1.

Stage#3

ADC_CCS_CFG is configurated to 0x0303 and then repeat the operation in stage#1.

Stage#4

ADC initiation configuration: Perform the register configuration in the following order.

Stage#5

ADC_CCS_IDS_n register is at the default value and ADC is configurated to Auto-mode, ADC_CCS_CFG Register is set to 0x040F. Then the customer found that the ADC sample value is not correct and only change the ADC_CCS_CFG Register to 0x010F the ADC sample value is recover to the expected value.

Could you help give your comments to this problem? Is it required to add calibration command for every cycle? 

Hey Shawn, thank you for getting back, and I am looking into this. Just to confirm my understanding, you are able to read the correct sample value when the  ADC_CCS_CFG register is set to 0x010F?

Hi Anshuman

Anshuman Srinivasan said:

you are able to read the correct sample value when the  ADC_CCS_CFG register is set to 0x010F

Yes.

Shawn_Wang said:

ADC_CCS_IDS_n register is at the default value and ADC is configurated to Auto-mode, ADC_CCS_CFG Register is set to 0x040F. Then the customer found that the ADC sample value is not correct and only change the ADC_CCS_CFG Register to 0x010F the ADC sample value is recover to the expected value.

Let me elaborate on the Stage#5 in case you are confused about it.

• ADC_CCS_CFG = 0x040F, ADC sample value is not correct. 
• ADC_CCS_CFG = 0x010F, ADC sample value is correct.

Anshuman will respond ASAP.

Hey Shawn, thank you for clarifying.

From going over your register configuration, your CCS_IDS_1 is F (as the value of ADC_CCS_IDS_0 is 0xDCFE), which is the ADC offset calibration code. This means that (from my understanding) when ADC_CCS_CFG = 0x010F, your sample value is correct because the ADC offset calibration was run in the first step of your conversion sequence, whereas when ADC_CCS_CFG = 0x040F, the ADC offset calibration code F is skipped. 

I have ordered an EVM to my desk in Dallas so I can verify this on the board; in the meantime, since it appears you are not using the IDAC channels for now in your application, can you write the value 0xDCFE to register 0x72 in ADC Config (instead of 0x7654)? Once this is done, I believe the 0x040F setting should work correctly

Best regards,

Anshuman

Hi Anshuman

Anshuman Srinivasan said:

From going over your register configuration, your CCS_IDS_1 is F (as the value of ADC_CCS_IDS_0 is 0xDCFE), which is the ADC offset calibration code. This means that (from my understanding) when ADC_CCS_CFG = 0x010F, your sample value is correct because the ADC offset calibration was run in the first step of your conversion sequence, whereas when ADC_CCS_CFG = 0x040F, the ADC offset calibration code F is skipped. 

Exactly. The customer feedbacked the ADC sample value is correct if add the VDAC[1,2]，VDAC[3,4] calibration in the conversion sequence, but if no VDAC[1,2]，VDAC[3,4] calibration in the sequence the ADC sample value all are FFFF. The customer does "run a single conversion of the calibration channels at start-up" according to the D/S.

So the question here is that why there still need calibration for every conversion sequence? And is it necessary to do the calibration at startup? 

Anshuman Srinivasan said:

can you write the value 0xDCFE to register 0x72 in ADC Config (instead of 0x7654)? Once this is done, I believe the 0x040F setting should work correctly

I think it should be okay because this would also add the calibration for every conversion sequence. 

Anshuman Srinivasan said:

I have ordered an EVM to my desk in Dallas so I can verify this on the board;

Have you met this problem? And what is your recommendation for the calibration?

Anshuman will get an response to you soon.

Hi Anshuman

Anshuman Srinivasan said:

I would suggest you still try to set your configuration register at 0x72 to 0xDCFE

What is value of ADC_CCS_CFG for this test? 

When 0x72=0xDCFE and ADC_CCS_CFG = 0x040F, actually the sample sequence is VDAC1-> ... ->VDAC4 -> Calibration -> ADC1-> ... -> ADC4, and the calibration is located between the VDAC sample and ADC sample. So if calibration is required for every sequence, VDAC sample value is no correct but ADC sample value is correct for this test. Is this what you want to check? 

BTW, what is your schedule for this EVM test at BU lab? 

Hey Shawn,

For this test, I was only looking to check if the ADC works with 0x040F, and if your VDAC returns an incorrect value then it would confirm calibration is required for the DAC and ADC channels before correct values are obtained. If you are able to run a test with this configuration on the device, let me know regarding the results whenever possible.

Also, I will have the EVM setup at the lab by Wednesday (with the configuration file for the test sequence already done) so I can confirm my results for each conversion sequence, with and without prior calibration

Thank you for your time and understanding, and with best regards,

Anshuman Srinivasan   

Hey Shawn, hope you are doing well. As an update, I got to run ADC conversions on the 60804EVM today at the BU lab, testing all 4 channels. I found that in my case, ADC offset calibration needs to be run once at startup, as if you start conversions without running that calibration all returned ADC values are approximately 10mV lower. However, if ADC offset calibration is run and the ADC_CCS_CFG register is subsequently changed to 0x040F, the conversion return the correct values and ADC offset calibration doesn't seem to be required for each conversion after the first one in order to observe consistent values.

Can you verify whether you are able to obtain a correct value from the ADC for a conversion after just the ADC offset calibration has run? To test this, set ADC_CCS_CFG to 0x0101 first (which will not perform any conversion, but will perform the offset calibration) and then set ADC_CCS_CFG to 0x040F to run conversions. In my case, the above test seems to yield correct values, so I would like to double check. If you could also send me the voltages you are providing to each ADC channel, I can run the same voltages on my input channels and cross verify the results. Also note that you should use the original register configuration (i.e 0xDCFE is in register 0x70, and 0x7654 is in register 0x72

Let me know regarding the above any time you are able and I will coordinate,

Best regards,

Anshuman Srinivasan