DAC121S101: DAC121S101

Rajan Bedi

Part Number: DAC121S101

hello,

Page 25 of the datasheet for the DAC121S101 shows a 200pF and a 2K resistor connected to VOUT, why is this and are both these passives required?

Kind Regards,

Rajan

0 Paul_Frost over 1 year ago

Hi Rajan,

This is not required. We just this to simulate common loads on the outputs so that we are demonstrating unloaded performance.

Thanks

Paul

0 Rajan Bedi over 1 year ago in reply to Paul_Frost

Expert 1465 points

Hi Paul,

Can I drive the DAC's SPI I/O (SYNC, SCLK and DIN) using two FPGAs (prime and redundant) of which only one will be active at any one time please.

Kind Regards,

Rajan

0 Paul_Frost over 1 year ago in reply to Rajan Bedi

yes, assuming that the redundant FPGA is high-z, so that you do not have conflicting push-pull logic.

0 Rajan Bedi over 1 year ago in reply to Paul_Frost

Expert 1465 points

thank you very much, would you envisage any potential signal integrity issues?

0 Akhilesh K over 1 year ago in reply to Rajan Bedi

Hi,

If one of the FPGA is high Z I don't see any issues with signal integrity. Make sure board related issues are taken care of ( layout)

Regards,

Data converters forum