ADC12DJ5200RFEVM: ADC12DJ5200RF EVM DB0_FMC - DB3 P/N signal is the opposite?

Hello,

I am looking at the ADC12DJ5200RF EVM_RevD schematic for pin mapping with the FPGA board.

On page 7, transceiver B channels P/N look like the opposite.

For example DB0, EVM_RevD schematic shows:

J1B B12 - DB0_FMC_N

J1B B13 - DB0_FMC_P

And Xilinx VCK190

B12 - FMCP1_DP7_M2C_P (GTY_RXP3)

B13 - FMCP1_DP7_M2C_N (GTY_RXN3)

Please confirm.

Thanks,

Kiman