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AMC7836: Gate voltage value abnormal in Low temp(-40°)

Allen Lu
Intellectual 1870 points
Part Number: AMC7836

Hi team:

 My customer use AMC7836 in their DAS remote units by using two pcs  AMC7836 for amplifier gate voltage read and write control, with a XILINX FPGA as the host and three slave devices hanging under the SPI bus: two AMC7836 (AD/DA chips, AMC7836_1, AMC7836_2) and one AD9543 (clock chip). The SPI bus is terminated with 22Ω resistors.

 Here is the fault phenomenon:

1. At room temperature, all chips can run stably. At low temperature -40℃, it was found that the output gate voltage value of AMC7836_1 oscillated back and forth in an irregular manner, and the corresponding registers (1e, 1f) of AMC7836_1 also oscillated repeatedly, while AMC7836_2 and AD9543 were normal.

2. After changing the SPI resistor value to 33Ω, the abnormal phenomenon of AMC7836_1 at low temperature was greatly reduced, but after repeated experiments, there were several exceptions.

3. After changing the SPI resistor to 0Ω, AMC7836_1 will be abnormal at room temperature. The attachment includes the test waveform of 7836-1 when an exception occurs.

7836-1.zip

Please help to analyze the cause of the 7836 exception, thank you!

Circuit diagram:

PCB layout:

  • 0
    TI__Guru 53173 points

    Hi Allen,

    Have they used an oscilloscope to monitor the SPI commands? What speed are they running their SPI commands? You mentioned the bias points are oscillating. Is that due to some kind of readback issue, or is it happening in the analog domain? Is VREF stable?

  • 0 in reply to Paul_Frost
    TI__Intellectual 1870 points

    Hi Paul:

     Yes ,the customer use oscilloscope to monitor the SPI waveform, the speed of SPI is 1.56MHz.

    1.  They also did a frequency exchange experiment, contrary to expectations, increasing the clock frequency to 4MHz did not significantly increase the recurrence probability; but reducing the frequency to 500KHz, the error probability increased significantly. So is it possible that this is due to the timing? because the rising edge is too steep and the matching is not done well, resulting in a problem in the signal amplitude? If there is a requirement for this inside the chip?

    2. The registers (1e, 1f) are directly related to the DAC output, so they are more related. When an error occurs, other registers are read, and jumps will also occur, and the registers are read through SPI. Disconnecting the post-stage load of AMC7836 will also jump.

    3. VREF is stable.

  • 0 in reply to Allen Lu
    TI__Guru 53173 points

    Hi Allen,

    Can they share oscilloscope captures of this? What are the exact values being read back? Are we seeing some kind of bit-shift? 0x400 becomes 0x800, for example?

  • 0 in reply to Paul_Frost
    TI__Guru 53173 points

    I just noticed the zip.  Let me review this again.

  • 0 in reply to Paul_Frost
    TI__Intellectual 1870 points

    Hi Paul:

     tks for your comments ,is there any update of this issue? tks again,

  • 0 in reply to Allen Lu
    TI__Guru 53173 points

    Hi Allen,

    Sorry for for the delays.  I am wondering if we are seeing an autorange issue.  This device has some autorange detection functions.  Is VCC/VSS or IOVDD collapsing? This might look like momentary cross talk from the digital line. 

    What exactly is happening on the DAC output during the event?

    "it was found that the output gate voltage value of AMC7836_1 oscillated back and forth in an irregular manner" what does this look like?