Other Parts Discussed in Thread: TSW14J57EVM
Hi,
I am facing what seems to be a communication issue between the ADC EVM and TSW (FPGA) EVM. Please see error below:
From my side, we've made sure of the following:
1. jumper J13 REFSEL is installed on the EVM
2. current limit for ADC evm is set to 3A and TSW14J57EVM is set to min of 5A
3. I can read the temprature through ADC GUI. Clocks are verified to be 5.2G going to J10 (Dev CLK) and 260MHz into J17 (ref CLK), each with about 1.6V swing.
4. DEV CLK is 5.2G & Ref CLK is 260MHz, boht clock are locked and coming from Jbert, the EVM is in External CLK mode.
When ADC EVM is powered up and TSW EVM is powered up, the 3 LEDs on ADC GUI'e JESD tabs are green, but after loading the FW into FPGA EVM only SerDes PLL LED is green. not sure if this is relevant.
D4 LED on TSW doesn't blink.
Below is the pictur eof the setup:
