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LMP90100: Channel Scan Order doesn't seem to follow FIRST_CH to LAST_CH

Part Number: LMP90100

When reading data from AFE using SCAN_MODE1 or SCAN_MODE2 , all channels in the range FIRST_CH to LAST_CH get scanned, but not in the expected order. For example, in order: (FIRST_CH + 5) through (FIRST_CH +4).

  • Hi Noah Pierce,

    How are you determining which channel is being sampled? Are you using the SENDIAG flags, or is the output data not matching the channel you expect to be on? I would typically use the DRDY pin as an indicator of what channel you are on. So, when DRDY drops low for the first time after initiating (or restarting) conversions, that is CH0 (or whatever FIRST_CH is). Then, when DRDY drops low again, that should be the next channel in the sequence, and so on, until the last channel is reached.

    It would be helpful to see the data communication using a logic analyzer. The LMP potentially provides a lot of information so I'm not sure how useful I can be without seeing what you are seeing. 

    -Bryan

  • Hi Bryan,

    I've got the LMP set up to interrupt my micro on DRDYB. In the interrupt handler I read SENDIAGS and output the 3-bit channel value onto three pins which I read using an oscilloscope.

    When I set a breakpoint in the interrupt handler and view the last three bits of the SENDIAG register I never see it as CH_0. Sometimes I see CH_4, CH_5, or CH_6.

  • Hi Noah Pierce,

    In your original post you said that all of the channels are being read, but not in the correct order. How are you determining that all channels are being read if you only ever see certain registers in the SENDIAG register? Are you able to apply different voltages to each of the channels (0 to 6) and successfully measure them all?

    I guess I am trying to figure out if the issue is with your ability to read data, or just determine which channel's data is being read

    -Bryan

  • When I use SCAN_MODE2 and CH_FIRST_CHAN_CH0 | CH_LAST_CHAN_CH6, I am able to see all the channels come across (via 3 LSb of SENDIAG while monitoring on external oscope) in the correct sequence (for the most part) but not starting at channel 0. The voltages I'm getting on each channel are also what I'm expecting. However, I'm confused as to why I have to track every channel read and cannot rely on having scanned the entire range of channels once I get to CH_LAST_CHAN_CHx

    My concern is whether there's a possibility of using stale readings, having dropped readings, etc.

    I want to use SCAN_MODE1 so I can determine exactly when to start a scan cycle, and I want to be able to scan all channels in a fixed order and fixed amount of time.

  • Hi Noah Pierce,

    Can you describe what you mean by this:

    I am able to see all the channels come across (via 3 LSb of SENDIAG while monitoring on external oscope) in the correct sequence (for the most part)

    Specifically, what do you mean by "for the most part"? I understand that the ADC does not necessarily start on FIRST_CH, but I assumed that once the sequence started, it always followed the correct order. Are you saying that sometimes the channels randomly come out in the wrong order? If so, can you describe this in more detail?

    Also, have you confirmed if the data you are receiving matches the channel you expect, regardless of the SENDIAG bits? For example, if you had 0.5V on Ch0, 1V on CH1, 1.5V on CH2, and so on, does the data actually come out in the correct order such that the first DRDY transition outputs a code that is the equivalent of 0.5V, the second DRDY transition outputs 1V, etc.? There is no obvious reason why the bits in SENDIAG would not correspond to the correct channel, unless it was always offset by one channel e.g. you are sampling Ch1 but the SENDIAG bits show CH0. This is described in section 9.3.8.3.5 in the datasheet.

    I will likely need to see the complete data transaction to be able to diagnose this further.

    -Bryan

  • The channels don't come out in random order, but occasionally start from a different channel (3, 4, or 5). I want the order of channels scanned to be deterministic.

    Each channel is connected to an external sensor input, and the values I'm getting are in their expected ranges, so my determination of channel is only based on the SAMPLED_CH bits of SENDIAG_FLAGS.

    Since the ADC doesn't necessarily start on a given channel, I'm testing using SCAN_MODE1 with a range of a single channel and after reading each channel, writing a new CH_SCAN channel when CH_SCAN_NRDY is 0. However, I am not seeing a change on DRDYB after writing ADC_RESTART unless I write to RESETCN (and rewrite all of my control and config registers).

  • Hi Noah Pierce,

    Do the data values you read from the ADC always match the channel you are reading in the SENDIAG bits? In other words, you said that the SENDIAG bits sometimes indicate that the sequence starts on the wrong channel e.g. channel 3. When this happens, does the data you receive always correspond to the actual voltage applied to channel 3, or does it correspond to a different channel? I am hopeful that the data is coming out in the right order, and it is just the SAMPLED_CH bits that are incorrect. Please confirm

    Also when this happens using SCAN_MODE1, does the sequence wrap around? So, for example, you are using SCAN_MODE1 and you have FIRST_CH = Ch0 and LAST_CH = Ch6. However, once you begin reading data the first sample indicates you are on Ch3 instead of Ch3. Do the subsequent SAMPLED_CH bits follow the pattern Ch4, Ch5, Ch6, Ch0, Ch1, Ch2? Or does the the sequence stop at Ch6, as it should? 

    Have you seen this behavior on multiple boards, or just one? Have you performed an A-B-A swap to see if the issue follows the ADC or the board? Also, I assume you are using your own PCB, not the EVM, correct?

    -Bryan

  • When using SCAN_MODE1 I see the data stopping at Ch6.


    Interesting thoughts.I'll get something set up to confirm Data matches SENDIAG bits and whether the issue occurs on multiple boards, follows the ADC, or follows the board.

  • Hi Noah Pierce,

    Let us know what the results from these tests. As mentioned previously, there is no obvious reason why the SAMPLED_CH bits would be transmitted in a random order, which is why I have more questions than answers at this point

    -Bryan

  • Still in testing, but I have a quick question: do the GPIO pins D0-D5 on LMP90100 have internal pull up or pull down resistors? We have left these pins disconnected and I'm wondering if them being left floating and set at inputs is causing issues.

  • Hi Noah Pierce,

    The LMP90100 does not have internal pull-up / pull-down resistors on the GPIO pins. You should also not let these pins float. Tie each pin to some voltage level (either GND or VIO). You can also set the GPIOs as digital outputs, where they are allowed to float

    -Bryan