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ADS8699: SRC Internal Clock problem

Part Number: ADS8699

Dear Specialists,

I want to use the ADS8699 as SPI master, and MCU SPI as slave. From the datasheet, I found ADS8699 RVS pin can send clock as SPI clk signal, and RVS is from internal clock (Figure 6-8).

My question is:

After the CS is pulled low, the RVS pin can output clock that is synchronous with the output data. If CS keeps low, how many clock number the RVS pin can output ? 

Because output data is 32 bit, the RVS clock number is 32, is that correct ? Or the RVS clock output until the CS is pulled High ?

Thank you.

Lilong


  • Hello Lilong,

    Thank you for your post.

    When CSn = low, RVS only outputs enough clock pulses to read all the data. The number of clocks will depend on whether you have configured the device for single-SDO or dual-SDO mode.

    Regards,

    Ryan

  • Hello Ryan,

    Thank you for your answer.

    ADC is configured as single-SDO.  RVS only outputs enough clock pulses to read all the data, which means clock pulses are 32, is that correct ? 

    Another question, the ADC supports Daisy-Chain connection. Will RVS outputs 64 clock pulses if two ADCs are in Daisy-Chain connection if CS keeps low?

    Thank you.

    Lilong

  • Hi Long,

    Apologies for the delay. Let me check on this and get back to you next week.

    Regards,

    Ryan