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TSW14J57EVM: How to adjust the TRIG_IN voltage

Part Number: TSW14J57EVM

Hi, team

Please teach me how to adjust the TRIG_IN voltage.

I would like to make the external trigger input voltage even smaller than 1.8V.

The manual(slwu092) says it is adjustable, but I could not find a specific way to do this.

>3.3.3.1 SMA Connectors
>J13 TRIG_IN Adjustable level CMOS trigger input. Default level is 1.8 V

Can I change TRIG_IN voltage in the GUI?
Do I need to modify the hardware (EVM)?

Regards,
Takeo

  • Hi Takeo,

    Switch SW7 controls the voltage used by the FPGA bank that the TRIG signals are connected to. The available voltages are as follows:

    SW1 ON, SW2, SW3, SW4 OFF = 1.4V

    SW2 ON, SW1, SW3, SW4 OFF = 1.8V (default)

    SW3 ON, SW1, SW2, SW4 OFF = 2.5V

    SW4 ON, SW1, SW2, SW3 OFF = 3.0V

    If the VCCIO is set to 1.4V (only requires changing the SW7 positions) then the Vil and Vih levels will be 0.35*VCCIO and 0.65*VCCIO, which equates to 0.49V and 0.91V.

    If you need lower than this, I would suggest to use an external amplifier to boost the trigger up to 1.4V and set the dip switches of SW7 to be for 1.4V. However, for this FPGA, the VCCIO can be as low as 1.2V but not any lower. If the VCCIO is set to 1.2V (which requires modifying resistors in feedback path of U22) then the Vil and Vih levels will be 0.35*VCCIO and 0.65*VCCIO, which equates to 0.42V and 0.78V.

    You will have to decide whether it is worth the hardware change to achieve a 0.78V threshold instead of the 0.91V threshold that can be achieved by simply modifying the SW7 switch positions. If you need even lower than these values, you will have to use an external op amp to boost the signal.

    Thanks, Chase

  • Another thing to consider is when SW7 is adjusted is that this affects both the trigger input and the trigger outputs.

  • Hi, Chase

    Thank you for your response.
    I understood very well.

    This EVM is very well thought out.

    I will tell our team members.

    Thanks,
    Takeo