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ADC12DJ3200: adc12dj3200

Part Number: ADC12DJ3200

Tool/software:

Hi!

I have a problem when using adc12dj3200. The ADC is set to JMODE 0, but DA1 in the A link is corrupted. I tried using the JEXTRA_A register mentioned on page 119 of the ADC12DJ3200 manual, using DA4 to DA7 instead of DA0 to DA3, and DB0 to DB3 for the B link, but the ADC data I received was not what I wanted.

    

  • Hi,

    Please let us know if you are using the ADC12DJ3200EVM from TI or your own board design.

    Please send over all the register writes that you are configuring the ADC with in JMode0.

    This will allow us to help you quicker.

    Thanks,

    Rob

  • Hello,

    The ADC also has a number of test pattern modes it can output to help debug the JESD link. Can you please set the ADC test pattern mode to Transport Layer Test Mode. This can be done by setting the JTEST register to a value of 5. After doing this please capture data and what you see should match what is seen in table 41 of the datasheet.

    Thanks,

    Eric