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TRF1208-ADC12DJ5200RFEVM: Error: Start ADC to DDR

Shota Mago
Expert 7710 points
Part Number: TRF1208-ADC12DJ5200RFEVM

Tool/software:

Hi team,

When my customer clicked Capture with Single Tone, below error message showed up.

What should we do to resolve the error?

Best regards,

Shota Mago

  • 0
    TI__Mastermind 31910 points

    Hi Shota,

    Please have the customer check the current limit on the FPGA data capture card.

    I assume they are using a TSW14J57 or J59, make sure the current limit is set for 12V, 5A.

    Regards,

    Rob

  • 0 in reply to Rob Reeder
    TI__Expert 7710 points

    Hi Rob,

    Thanks for your quick reply.

    They're using TSW17J59, but I can't find current limit setting from the User's Guide.

    Is there selectable current limit feature on the board?

    Or do you mean to use >5A capability DC power source?

    Best regards,

    Shota Mago

  • 0 in reply to Shota Mago
    TI__Mastermind 31910 points

    Hi Shota,

    I mean the power supply should have the capability of 5 or more Amps. The current limit setting on the lab bench power supply should be set to 5A.

    This is to overcome the inrush current when the FPGA programs. Otherwise, if the current limit setting on the lab bench power supply is too low, the FPGA won't fully program and you will get errors.

    Thanks,

    Rob