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Interfacing ADS62P43EVM with Vitrex-5 FPGA

Other Parts Discussed in Thread: ADS62P43

Hi,

I am trying to interface the ADS62P43 EVM board with a Virtex-5 FPGA board from Xilinx. I have currently connected the two boards together.  A 20 MHz clock source is provided to the ADS62P43 EVM board by a 100 MHz oscillator in the FPGA board. I am using a DCM to divide the 100 MHz clock to supply a 20 MHz clock source to the ADS62P43 EVM board ( via SMA connectors).  I have connected the data lines together using CMOS interface. I have programmed a VHDl code onto the FPGA board where all the data lines are buffered and also the clock output. I have also set the ADS62P43EVM board with default register settings. But when I run the two boards, I am not able to get a clock output from the ADS62P43. In order to make sure my clock source is correct, I detected the clock on an oscilloscope and it clearly shows a square wave being fed to the ADS62P43 board. I am not sure what the problem is? If anyone is aware of what the problem could be, please let me know.. I am not sure If I am following the correct procedure. 

Thanks

Mahadevan

  • Mahadevan,

    The first thing we should check is the output data format setting on ADC sided based on the FPGA input data format setting.

    The ADS62P43 output data including clock output has two formats for both CMOS and DDR LVDS output modes, one is 2’s complement another is straight binary (SB). The format can be set by hardware pins (see table 2 in “parallel interface control” of the data sheet) or internal registers. Since you mentioned register, I am assuming you are using serial interface control (page 13 of the data sheet). In this case you need to set Register 14 (D5=0: CMOS output) and register 16 (D4=0: 2’s; D4=1: SB) for data output format based on your FPGA input data format.  The EVM defualt data is 2's format.  Also, the Over-ride bit (D7) in register14 should be set to 1 to avoid impact from parallel pin setting on CMOS/LVDS selection. Send Reset code before send any thing. Please follow EVM user guide to set JP8 to JP11 for serial interface control.  

    The second, the input clock amplitude should be in the spec and should avoid different DC offset (different from ADC Vcm) from clock source connected to ADC clock input directly, in this case we can use AC coupled clock path.

    Third, there is a suggestion in the data sheet page49 about how to use clock output depending on DRVdd voltage level. I am bring it here for your reference.    

    Regards,

    Hui Qing

  • Hi Qing,

    I tried whatever you had suggested, but i am not able to get a channel clock output from the ADS62P43 board. As of now, I just wanted to test the clock output from the ADC boards. So, I provided the ADS62P43 board with a 2MHz clock input from a function generator alone,  without connecting the data lines to the FPGA.  And I connected the clock output (Pin 39 in the board) to an oscilloscope. I also manually set all the register values, accordinng to what you suggested (Register 14 and rest were default values). But still no clock output.. I am confused as to what could be the problem. Please help me out 

    Thanks

    Mahadevan

  • Mahadevan,

      Please check if the board is function or not. Please check pin2 at JP15, JP16 for 3.3v, also ADC supply pins for 3.3v, check if the Vcm at clock input pins and analog input pins is in spec. You only need a 5v power supply at P5 for the board. If board looks normal please set the ADC Jumps to default, i.e. parallel or pin control mode as following,

    Please set JP15(2-3), JP16(2-3) for LDO  

    Please set JP8(1-2), JP9(1-2), JP10(1-2), JP11(1-2), JP5(1-2), JP6(1-2), JP7(1-2), 

    Please set JP12(1-2) for internal reference mode, note this jump has 4 options,

    Please set JP14(7-8) for 2's and CMOS output, this jump has 4 options. 

    After power on, you should see clock output at CMOS level if the board is not damaged.  

      Is it possible we talk this by phone if you still have problem (please provide your phone number)? I think phone will be much easier than by e-mail.

      By the way, I tried to change the “answered” mark to ‘not answer yet’ for this post, but seems couldn’t do it.

      I hope this helps,

    Regards,

    Hui Qing

  • Hi Hui,

    I did the following troubleshooting steps : 

    1. Checked ADC supply pins ( AVDD and DRVDD) for 3.3V . The result was positive. 

    2. Checked VCM at clock input  . I got 1.55 V from the VCM testpoint. ( as per specs)

    3. Checked JP15 and JP16 for 3.3V. I received 3.3V from Pin 3 of JP15 and JP16 and not from Pin 2.

    4. Provided the board with 5 V power supply on P5 and ground connected to P4. I have shorted P4 and P6.

    5. Provided a 2 MHz square input from a function generator as the clock input ( SMA P4) 

    6.  Set the following jumpers 

    - JP15(2-3) and JP16(2-3)

    - JP8(1-2), JP9(1-2) , JP10(1-2, JP11(1-2), JP5(1-2), JP6(1-2), JP7 (1-2)

    - JP12(1-2) and JP14(7-8)

    After turning on the power , I still could not get the clock output from pin 39. Could it be because I am providing the board with a low clock source of 2MHz??  

    My number is +1519 697 8104. I desperately need to fix this problem asap.. Please help me out..

     

    Thanks

    Mahadevan

  • Hi Hui,

    Is there any other troubleshooting steps that I can do?? I have performed everything that you have mentioned and verified with the specs. But no clock output  :(  .. Could the chip be damaged alone?? What other possible steps should I take if it is damaged?? Could I get a replacement for the board?  If you could give your number, I could call you according to your availability. Anticipating your reply.

    Thanks

    Mahadevan

  • Mahadevan,

     You also can check the device current value, see if it is normal or not based on the spec table in the data sheet. By doing this, you can bypass the LDO and add the supply voltage to the device directly through the jumpers. This way you can find out if the part is damaged or not.  Also, you need to make sure your probe has low pf and grounded when you do the measurement.  Anyway, you should at least see some kind of waveform when you probing if it is probe issue.   Your part can got damaged alone. If so, you can order the part to replace it yourself or I think you can contact with TI local office for help, see if they provide you a EVM. What is your application and production?   Please contact with TI local office to get help.

    Regards,

    Hui Qing

     

     

  • Case Update: Checked the customer borad set up and some measurement through phone, we found the part could be damaged because the source current reading is wrong. The customer is going to get another board and we agreed to close the case.

    Regards,

    Hui Qing