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ADS1263: Chop function

Part Number: ADS1263
Other Parts Discussed in Thread: , ADCPRO

Problem:  Chop function.

(1) In the ADS1263 datasheet, there is no explanation of the chop techniques used. The only note is in Sec. 9.3.6 (The PGA consists of two chopper-stabilized amplifiers...).

(2) In Sec. 7.5, general conditions, there is no definition of chop mode used. The only note appears at Offset voltage and Offset voltage drift. Does this mean that all the specifications in Sec.7.5 belong to both modes, chop mode ON and chop mode OFF ?

(3) Specifically, the noise tables in Sec. 8.8 belong to both chop modes ?

(4) When experimenting with the ADS1263EVM-PDK, Tab 3: Digital filter shows two windows ADC1 Data Rate. When  chop is disabled, the figures in both windows are the same, e.g. 400 SPS and 400,0Hz, regardless of the ADC1 filter type. When chop is enabled, the figures are different, e.g. 400 SPS vs. 391,8Hz with filter Sinc1, 197,9Hz with filter Sinc2, 132,4Hz with filter Sinc3, and 99,5Hz with filter Sinc4. Now, what is true? There is no explanation of this behavior in the ADS126xEVM-PDK Users´Guide.

(5) When experimenting with the ADS1263EVM-PDK, is there any possibility to prolong the programmed acquire alert of 30,0 sec ?

Thank you for your response.

Best regards,

Jiri Dostal

  • Hi Jiri,

    (1) There are two different type of chopping in the ADS1263.

    i. The PGA is composed of chopper-stabilized amplifiers. Chopper-stabilized amplifiers are a type of amplifier which utilizing chopping to reduce offset, drift, noise, etc. The actual implementation isn't too important to know about. If you're interested, there is some more information about the advantages of chopper op-amps, found here:  

    ii. Chop mode is a mode you can enable or disable. When enabled, this mode simply takes 2 measurements with the ADC input polarities swapped and then provides the averaged output result. This type of chopping is explained a bit more in section 9.4.12 of the datasheet. 

     

    (2) It would be safe to assume that chop mode is OFF unless otherwise noted. The main parameters that are affected by chop mode are the offset, offset drift, and noise.

     

    (3) The noise performance is specified with CHOP OFF. When CHOP mode is enabled you'll likely see the noise improve by a factor of sqrt(2) due to averaging.

     

    (4) The effect of chop mode on the data rate is real and is more noticeable for SINC2 or higher filter orders. The reason for this is that the digital filter requires a certain amount of time to settle after an input step. When CHOP mode is enabled, the digital filter must settle twice!!

    When using the SINC1 filter, the filter settles after 1 conversion period, therefore there is not too much effect on the data rate. There is still some effect because of the conversion start delay.

    When using the SINC2 filter, the digital filter requires ~2 conversion periods to settle. Therefore, it will take a total of ~4 conversion periods to acquire 2 results and average them together.

    Equations 19-21 provide the latencies and effective data rates when using CHOP mode.

     

    (5) Yes, this alert time is configurable on the "Extras / About" tab.

     

    I hope that helps, let me know if you have any additional questions!

    Best Regards,
    Chris

  • Hi Chris,

    Thank you for your very prompt response. I overlooked Sec. 9.4.12 of the datasheet. Later I will turn to you with some other question.

    Best regards,

    Jiri
  • Part Number: ADS1263

    To Christopher Hall

    Hi Chris,

    When experimenting with the ADS1263EVM-PDK, I observed the following issue. On the "IDAC \ Sensor Bias" tab, after clicking the IDAC Rotation, the ADS1263 will be automatically switched in the CHOP Disable mode. I recognize this according to the value of the Input offset voltage measured. However, this mode is not declared on the Input Chop button, which is still in the CHOP Enable state. When trying to leave this CHOP Disable mode, it does not help to click back the IDAC Rotation window. The only way (besides resetting the eval board) is to click twice the Input Chop button: into the CHOP Disable mode and back into the CHOP Enable mode. I have´nt find any notice of this in the ADS1263EVM-PDK User´s Guide.

    Best regards,

    Jiri

  • Hi Jiri,

    I am seeing the same thing... Enabling IDAC Rotation overwrites the input chop setting and it does not update the front panel controls. That is definitely a bug in the GUI. The problem is likely due to the fact that IDAC rotation and input chopping settings both modify the CHOP[0:1] bits in the MODE0 register.

    NOTE: You can go to the Register Map page and click "Refresh Register Map" and the front panel controls will update to match the device's register settings, should you suspect that they are out of sync. This was how I was able to verify that input chopping was in fact disabled.

    However, after enabling IDAC rotation and re-enabling chop mode, the input offset still appears to reflect the offset when input chopping is disabled. Do you see this as well? I'll need to look into that a bit more to see if that is real or if perhaps this too is a bug in the software.

    Thanks and best regards,
    Chris 

  • Part Number: ADS1263

    To Christopher Hall

    Hi Chris,

    Thank you for your response. Yes, i confirm your observation of discrepancy between (1) Register Map, (2) front panel controls and (3) real ADC behavior after enabling Rotation. The real ADC behavior will be judged according to the input offset voltage.

    However, there is still another issue - the interaction between Rotation and PGA1 Gain.

    When experimenting, I use the following basic settings: Block Size 512, Data Rate 400 SPS (391,8 Hz), Sinc1, AINCOM Level Shift ON, AINP1 and AINN1 = AINCOM, Bypass OFF, PGA1 Gain = 1 and 2, IDAC1 and IDAC2 Magnitude OFF, Rotation OFF.

    Under these conditions, I see the following real input ofset voltage: +240 uV at Chop Disabled and Gain = 1; +120 uV at Chop Disabled and Gain = 2; less than +/-1 uV at Chop Enabled and Gain = 1 or 2. This seems to be OK.

    Now, with Chop Enabled and Gain = 1 and after setting Rotation ON, I see the real input offset voltage +240 uV, which belongs to Chop Disabled and Gain = 1, see above, but the panel controls are still in the state Chop Enabled and Gain = 1.

    Now, with Rotation left ON and manipulating the Chop control on tab Input MUX from Enable to Disable and back to Enable, I see the input offset voltage +120 uV, which belongs to Chop Disabled and Gain = 2, see above, but the panel controls are still in the state Chop Enabled and Gain = 1.

    Thanks for your engagement and best regards,

    Jiri

  • Hi Jiri,

    Yes, that sounds like the same issue I was seeing... After enabling both CHOP and IDAC rotation, I observed rather large offsets that were comparable to the CHOP disabled mode.

    It would seem as though the CHOP mode is actually disabled, even though ADCPro reports that chop mode is enabled (from the register map). Give me a day or two to confirm this behavior with a different board. I want to see if this is just a bug with the EVM or if this is the actual device behavior.

    Thanks and best regards,
    Chris
  • Hi Jiri,

    I tested this out on another board and verified that when both CHOP and IDAC rotation are enabled that the offset is not entirely removed. The offset appeared to be half that of the offset measured in CHOP off mode. I'm still looking into the cause; however, my recommendation for now would be use just one of these modes at a time.

    If you still wanted the benefits of both operation modes, then you would need to manually implement one of these modes. For example, you could enable CHOP mode, configure the IDACs, and collect data. Then switch the IDAC channels and collect more data. Finally average the results of both IDAC configurations to get a more accurate result that cancels out any mismatches in the IDAC currents.

    Best regards,
    Chris
  • Part Number: ADS1263

    Hi Chris,

    Thank you for your explanation and recommendation.

    I look forward to your eventual next finding. For now, please, what do you think about the origin of the problem:  the ADS1263 chip itself or the eval board software?

    Thanks and best regards.

    Jiri

  • Hi Jiri,

    I tested this issue on another board with my own software, so for now it appears like this is a device issue.

    Best Regards,
    Chris
  • Part Number: ADS1263

    Hi Chris,

    Thank you for the opportunity to correspond with you.

    Best regards,

    Jiri Dostal