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DAC3171EVM: Configuring the cdce62005

Part Number: DAC3171EVM
Other Parts Discussed in Thread: DAC3174, CDCE62005, , FMC-DAC-ADAPTER

Hello,

I've got some problems configuring the cdce62005 on the dac3171evm board. I'm using the provided dac3174 gui software. With that I just want to configure the cdce chip's EEPROM. In general my input clock is a 5 MHz clock, and I'm producing three different output clocks 240 MHz each (DACCLK, FIFO, FPGA_CLK). For that I've studied the datasheet and I've written a config file for the tool provided.

My file looks like the following:

CDCE62005 Registers:
x0    x4000002
x1    xC184002
x2    xC184000
x3    xC384000
x4    x4000001
x5    x10001A6
x6    x00BF0B4
xF    x0000001

<<DAC3174 Registers:
x0    x4FC
x1    x600E
x2    x3FFF
x3    x0
x8    x6000
x9    x8000
xA    xF080
x14    x0

<<


With this I expect the cdce chip to be configured as well as the EEPROM should be written to in unlocked mode according to the datasheet (the last command 0xF 0x1). Unfortunately the tool does not provide a write to EEPROM button and this approach also does not work.
Can someone please tell me what I am doing wrong here? If this is not possible, can you please tell me how to configure the chip's EEPROM?
Another approach would be to write an own small program to send the commands via the USB port. For that I would need to know the protocol which I would have to send to the virtual com port which can then be parsed by the onboard Altera PLD. Otherwise would it be possible to reprogram the PLD with the help of the programmer pins?

Thank you for your help,
Lars

  • Hi,

    I just spent some time looking through the datasheet for the CDCE62005, and it does look like you should be able to access the eeprom function through the SPI commands, and I would also have thought that the last item in your config to address xF of the clock chip would do that.   We have not used this particular clock chip on our data converter EVMs for a number of years now, so I am not very familiar with that device.   The clocking forum would be a good place for questions specifically related to the device itself.    But from what I can see of the datasheet, you should be able to access that address xF in the device through the SPI port.   Looking at the EVM schematics, the wild card in the design is that PLD that the SPI signals have to go through to get from the USB device to the DAC or to the clock chip.  A few years ago I *did* create a new SPI GUI for the EVM, one that allowed read-back from the SPI registers as well as write, and to do so I needed to know how the signals mapped through that PLD.  Somewhere I have the Verilog code for that PLD, but I will have to look for it.  I also could load the new SPI GUI to a drop-box location.   One thing about the new SPI GUI I created is that there is documentation in the GUI files that would let you reverse-engineer what that PLD must be doing, as the GUI has text-based support files that show how the read and write commands to the USB device map out onto the 8 GPIO pins out of the USB device.   But unless there is something in the older GUI that does something like lock out address F, you shouldn't have to resort to that I would think. 

    I will look for these support files and see what I can figure out.

    Regards,

    Richard P.

  • Hi Richard,

    thank you very much for your response so far. I've just figured out, that there is some small error in my configuration regarding the clock settings, but that of course does not fix the EEPROM problem. Maybe the GUI just filters the write to EEPROM command, as you've mentioned before.. So I'm looking forward on what you're going to figure out.
    By the way just for your information: There is an issue with the board and an FMC-DAC-adapter card REV.D. They don't seem to fit out of the box although it is stated in the features tab on the dac3171evm page. But with some manual modification of the HSMC connector they now seem to fit.

    Regards,
    Lars

  • Hello Richard,

    have you been able to figure something out? I'm still struggling with some configuration options. I'm also not sure, if manually written loop filter configurations are sent to the cdc, because my DAC output always jitters when a reference clock is applied to the cdce. Would it be possible to provide me some information which data has to be sent through the USB port so that I can simply write my own configuration tool? I think reconfiguring the PLD would be a bit overdone.

    Thank you for your time.

    Regards,
    Lars
  • Hi,

    One thing I can do is that I could point you to a link to download a newer version of a SPI GUI for that EVM that would give better access to the programming of the DAC and clock chip, including the ability to do a read back.  Please see another recent posting: https://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/p/603821/2226927#2226927 

    I would need an email address to send such a drop box link.

    You mentioned some modification to make the adapter fit your EVM - would that happen to be the presence of some locking posts on the Samtec connector?  If so, then yes that can be an issue in some instances that would require the locking posts be removed by sawing off the ends of the offending connector so that the body of the connector fits into the older mating connector that doesn't have the locking tabs.

    Regards,

    Richard P.

  • Hello Richard,

    that would be very nice. My eMail should be visible on my profile now.
    At the moment I just have solved the problem by unsoldering the PLD and writing the SPI interfaces to the cdce and dac using a raspberry pi.
    The performed modification to fit the dac board to the adapter is exactly what you've mentioned.

    Thank you very much!

    Regards,
    Lars

  • Hi,

    sent to your email address.

    Regards,

    Richard P.