Does this device support multi-device coherency when using the internal PLL and VCO to use a lower frequency reference clock? If so any supporting data i.e. random jitter should have some independent contribution?
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Does this device support multi-device coherency when using the internal PLL and VCO to use a lower frequency reference clock? If so any supporting data i.e. random jitter should have some independent contribution?
Hi Douglas,
I am looking into this and will provide the requested data in a later post.
Thanks,
Eben.