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Some questions about DAC5689

jay chou
Intellectual 330 points
Other Parts Discussed in Thread: DAC5689

Dear sir /madam,

  I have a problem when I use TI DAC5689: my system clock is 100MHZ, (the frequency of the signal which I sent to DAC5689 is 1MHZ) ,how I set the CLK1 and CLK2 of DAC5689 ? I use differential clock for all the clocks and configure the DAC5689 at dual clock mode.

  Now I set the CLK1 at 100MHZ and CLK2 at 200MHZ, but the analog output wave is distortion.

Can you give me a reference value of the CLK1 and CLK2?

  At the same time, I also have a question about the input signal SYNC. How does it works ? I set TXENABLE 1.8V and don’t use SYNC. Is that ok?

  Thank you very much.

  • 0
    TI__Guru 68544 points

    Hi Jay, 

    My initial post never made it to the forum, i am posting this again.

    Hi Jay,

     

    The CLK1 is the dataCLK and CLK2 is the DACCLK. The relationship between dataclk and DACCLK is dataCLK*interpolation = DACCLK. Since you have 100MHz for dataclk and 200MHz for DACCLK, I am assuming you are using 2x interpolation.

     

    You can refer to table 5 and table 6 of the datasheet for register settings and clock input configuration

    The sync signal is an external signal that you can use to synchronize the digital blocks such as NCO. You don’t have to use the sync signal to sync the device, and you can use signals such as TXENABLE or software sync (SIF SYNC) to sync the device. For more information, please refer to recommended start-up sequence on page 41 of the datasheet.

     

    If you want, you are welcome to send me the register file you are using. I can check the configuration file that you are using.

     

     

    Best Regards,

    Kang Hsia

  • 0 in reply to Kang Hsia
    Intellectual 330 points

    Hi Kang Hisa,

        Thanks for your technical supports. Our problems were already solved.  

    Jay