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ADS1263EVM-PDK: Reading Shifts

Part Number: ADS1263EVM-PDK
Other Parts Discussed in Thread: ADCPRO, ADS1263

Hi TI Team,

 

We have experienced a certain shift after collecting data for a long time. Please see the pictures below. Would you please help us solve this problem with correct ADCPro settings? Thank you very much.

 

  

 

  • Hi Mike,

    What are you using as your input signal and reference sources? Chances are the data shift is real or the reference voltage is not stable.

    To confirm, I would suggest a couple of different test signals. For example, try repeating this test with the inputs shorted (to AINCOM with VBIAS enabled). Additionally, you could apply a voltage from the internal TDAC.

    Best regards,
    Chris
  • Hi Chris,

    Thank you very much for helping. We have tried various power sources. However, the break off is still observed. Do you have any advise? Thank you very much.

    Mike
  • Hi Mike,

    The ADS1263 is generally fairly immune to power supply noise, though it is still a good idea to try different supply sources. However, in my previous message I was referring to the analog signal source. In your ADCPro screenshots it looks like you are measuring a voltage between AIN0 and AIN1...what are you using using for this voltage source and have you tried measuring different input sources to rule out the the input signal as the source of the drift?

    Even though it would seem impractical, shorting the ADC inputs is actually a really good way to establish a baseline for performance and ensure that the ADC is working correctly.

    Another observation is that you appear to have the PGA bypass enabled on the "Input MUX" tab:

       

    I would recommend disabling the bypass to see if the error is a result of a higher-output impedance from the source. When the PGA is bypassed, the ADC inputs can draw additional current (they are not High-Z) which might explain the extra drift in the measurement result.

     

    Best regards,
    Chris

  • Hi Chris,

    We have tried different ADCpro settings. So far, this setting give us the best reading:

    Signal AINP1 AIN0
    AINN1 AIN1
    Bypass Enable
    Chop Disable
    ADC1 Filter Type Sinc4

    However, as the test time increases, such as increases to 72 seconds, we are still seeing the reading drift in the test data. I wonder if you could offer us some advise? Thank you very much.

    Best regards,

    Mike
  • Hi Mike,

    Have you tried re-testing with the inputs shorted to see if the problem still occurs with a different input signal? At the moment I don't have enough information to go off and this would seem to me a logical test for determining if these shifts are real results or not.

    Thanks and best regards,
    Chris
  • Hi Mike,

    Were you able to resolve this issue? If not, please let know know how we can be of more help!

    Best regards,
    Chris