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DDC264EVM: DDC264EVM long integration time issues

bran
Prodigy 120 points
Part Number: DDC264EVM
Other Parts Discussed in Thread: DDC264

Hi,

I am working with the DDC264EVM board, and having troubles with long integration times.

When I set integration times of the order of 0.3sec, the integration times seems to be much shorter, probably at the msec range, or less.

The DDC264 chip allows up to 1 sec integration time, so it seems like a bug in the DDC264EVM software.

Has anyone encountered this issue? Is there a solution?

Thanks,

Boaz

  • 0
    Prodigy 120 points
    Update:
    Apparently, it is possible to operate the DDC264EVM with the DDC114EVM software.
    When I do that, I can set integration times up to 1 sec.
    I guess this means that there is a software bug in the DDC264EVM PC software, can someone from TI support address this issue?

    Thanks,
    Boaz
  • 0 in reply to bran
    TI__Intellectual 2885 points
    Hi Boaz,

    You are correct, there is a limitation in the 264 EVM Software. The CONV Low Int/High Int has a 16bit (65536) number limit, even after adjusting the CLK and DCLK to the lowest frequency, the largest Integration time was 26,214 uS or 26 mS. Hope this helps and confirms your findings.
  • 0 in reply to Matt Mendez
    Prodigy 120 points

    Hi Matt,

    Thanks for the info!

    Although I've found a way to overcome this by controlling the DDC264EVM integration time with the DDC11xEVM software, and integration capacitor with the DDC264EVM software (both running at the same time on the same PC), I would rather think it is better to control it with it's dedicated software.

    Is there any chance of fixing this bug? I assume that the change is minor, replacing the definition of the variable controlling the integration time to a longer one...

    Regards,

    Boaz

  • 0 in reply to bran
    TI__Intellectual 2885 points
    Hi Boaz,

    I looked into this, and tried changing some of the code to a higher bit, but it would not work. To extend the integration time it would require updating the FPGA code as well as modifying a big portion of the code. Sorry.
  • 0 in reply to Matt Mendez
    Prodigy 120 points

    Thanks,

    I'll use the improvised technique, were I operate the board from two interfaces, one for the integration time and the other one for the rest.

    Regards,

    Boaz