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Hi,
I bought a high-precision AD/DA board form Waveshare that uses the ADS1256 as ADC. They provide an example program to read the analog values but this goes rather slow.
Can someone help me with this, I'm using a Raspberry Pi in combination with the board.
Chip select is connected to pin 15 and when low it will select the ADS1256. Data ready is connected to pin 11. Want to receive an incoming signal with the ADS1256 24-bit and set the outcome as the variable for the ouput DAC 16-bit and at least 8kHz.
Hope someone can help or set me in the right direction.
Hi Tom,
Sorry I was very unclear.
The board that I'm using can be found here www.waveshare.com/.../DA_Board
It uses the ADS1256 for ADC: www.ti.com/.../ads1256.pdf
and the DAC8532 ad DAC: www.ti.com/.../dac8552.pdf
While running the sample code they provided here: www.waveshare.com/.../File:High-Precision-AD-DA-Board-Code.7z
I tested the ADS1256_test and made some modifications to it, to only look at one poort (one ADC input). While reading a sinus fluctuating between 0 - 5 [V] I expected the program to print a lot of values between, lets say a step of 0.1[V] or even smaller. I think it has something to do with the DRDY of the ADS1256.
I could get better results by changing the configuration settings. Those are the SPI divider and the Samples per second (SPs). I got the best results by changing the Sps from 30000 to 1000 and the SPI fom 1024 to 256. Lowering the SPs for a better result was not what I expected. I tough more samples means better resolution.
Would it maybe help if I use one SPI bus for writing(DAC) and the other one for reading(ADC) on my Raspberry Pi.
Best regards,
Luc
Hi Luc,
How is the "ADS1256_ReadData()" function implemented? Perhaps the implementation of that function could be sped up.
Also, I notice that you have some "printf()" statements in your data collection loop. Please note that "printf()" calls can be very slow and might be the reason you're not reading data faster.
As to why performance improves when you change the clock divider, there are a couple of things that could be happening. In general a faster clock will fetch the data faster so that you don't miss any many samples. Also, if you are readying data while /DRDY goes low you could be getting corrupted data that is a combination of old and new data. Therefore, you might need to pay attention to the timing of when you read that data and also try using the RDATA command to clock out the data, as that command will buffer the output data and help prevent it from being overwritten as a new conversion completes.
Best regards,
Chris