ADC34J44: https://e2e.ti.com/support/data-converters/f/73/t/507326?tisearch=e2e-sitesearch&keymatch=ADC34J44

sanjay parekh

Part Number: ADC34J44

Hi,

I read in another post that LVDS signalling works to drive the SYNC input. But the common mode specified in the datasheet is 0.9V. What do I do if the common mode of the LVDS driver (e.g. FPGA) is 1.25V?

Thank you.

Best regards,

Sanjay

over 5 years ago

0 Jalen Tate89 over 5 years ago

TI__Genius 9675 points

Hi Sanjay,

I've forwarded your question to a device expert. You should get a response soon.

Jalen

0 dBrock over 5 years ago in reply to Jalen Tate89

TI__Genius 12780 points

Hi Sanjay,

Is the LVDS output from the FPGA a 1.8V signal? If not, I would suggest using a level translator in order to be in line with the datasheet.

Best Regards,

Dan

Data converters

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ADC34J44: https://e2e.ti.com/support/data-converters/f/73/t/507326?tisearch=e2e-sitesearch&keymatch=ADC34J44