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ADS7844: ads7844 busy signal

Xiaowei Bai1
Intellectual 1205 points
Part Number: ADS7844

Hello,

My customer is using the ADS7844, can you help to clarify below question?

1. After control byte is completed, When does the busy signal go low if no DCLK never?

2. what is the BUSY signal status after control byte is completed if the DCLK is provide immediately?

  • 0
    TI__Mastermind 24940 points

    Hello,

    1. The busy signal will go low once the device is finished reading the control byte, the datasheet does not give specific about how long this will take. I will need to dig a bit deeper for this.

    2. You should not send clock pulses while BUSY is high. The device is converting during this time, and if the output is clocked out, this will result in corrupt output data.

    Regards

    Cynthia

  • 0 in reply to Cynthia
    TI__Intellectual 1205 points

    Hello Cynthia,

    Do you get the result for question 1?

    and I think the BUSY pin "high" meaning is idle and the low meaning is "busy".  do you think the high meaning is busy?  also I need your help to clarify the question 2 still.

    BR

    Xiaowei

  • 0 in reply to Xiaowei Bai1
    TI__Mastermind 24940 points

    Hello,

    My apologies, let me readdress your questions.

    The BUSY signal will not go low without the SCLK pulses. The SCLK pulses are needed to clock the output the DOUT and for the input. Thus if no SCLK are provided, BUSY will not go low.

    You are correct about the state of BUSY, we are still working on how long the device needs after control byte. This is an older device, and there is limited information. The thought right now is that the device should provide DOUT data if SCLK is provided immediately, there is no need to wait to clock out the DOUT data after the control byte

    Regards

    Cynthia

  • 0 in reply to Cynthia
    TI__Mastermind 24940 points

    Hello,

    I have new information. After the control byte, BUSY will pulse high for one clock period, then the MSB will be ready.

    The device does not need to be a clock pulse sent for busy to go high after the control byte, but there should be waiting period of one clock period before the MSB is to be expected.

    Apologies for the back and forth

    Regards

    Cynthia