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TLV571: Maximum sampling frequency

Rolf Adelsberger
Prodigy 20 points
Part Number: TLV571

Hi there,

I am using the TLV571 with 3V and 10MHz external clock. 
In the datasheet it states that the maximal sampling frequency is FRQ/16, i.e. 635ksps for 10MHz clock.
However, interpreting the configuration confuses me: there it says that the device needs 6 clock cycles for sampling and 10 for acquisition... Then, I need one clock cycle to read out --> 17 cycles until a new acquisition cycle can be started. Or am I interpreting it wrong? Can the next cycle already start while I am reading out the current sample?

Please help me configuring the device to run with 625ksps. Thanks! :-)

  • 0
    TI__Guru**** 176421 points

    Hi Rolf,

    Welcome to our e2e forum!  The TLV571 samples for 6 clocks (this is the acquisition time) and then converts that sample in 10 clocks.  To get the full 625kSPS with your 3.3V supply, you would need to run the part in software start mode with an external conversion clock, see Figure 6.  Figure 6 shows initially, a write access to configure the device.  The rising/WR triggers the sampling and the conversion process starts sis clocks later.  Once the conversion is complete, you can read the data, and then the rising /RD starts the next sample period.  The process repeats from then on with sample/convert/read, sample/convert/read...

  • 0 in reply to Tom Hendrick
    Prodigy 20 points

    Thanks a lot, Tom!

    This solved my issue. I was initially wasting one clock cycle to read the results, thus my overall sampling rate decreased to 10MHz/(6+10+1) = 588ksps.

    Now, I have the 625ksps as needed!

    All the best.
    Rolf