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ADS1015: Some questions about ADS1015

ttd
Mastermind 8280 points
Part Number: ADS1015

Dear Technical Support Team,

My application measures DC voltage is measured.

What kind of effect can be expected when a sine wave of about 5MHz to 50 MHz is superimposed as a noise source?

■Input conditions / measurement conditions
DC voltage: 　about 1V
Superimposition type: 　frequency 5MHz, voltage 0.5Vp-p
ADC setting: 　single-shot mode (read about once per one second)、single-ended input,

1600SPS (Since it is used in single-shot mode, so I don't really care about the sampling rate.)

■Measurement result
  ADC output: The average voltage of the input signal is always output. About 1V
→ (In our measurement, it seems that a value close to the average voltage is output.)

■Questions
① Can the data of sample points be converted correctrly?
②Why the ADC output is always 1V ? Could you explain principle?

⇒My opinion about ① and ② below

   No information was found in the data sheet regarding the pass frequency band of the analog input or the digital filter.

   There was a description of fDOM (250kHz) in the data sheet.

   The transfer function of the Sinc3 digital filter is notched at an integral multiple of 250kHz, and 5MHz matches the 20th order, so I think it was successfully eliminated. Is it correct?

③By the way, how long does it take to convert once in single-shot mode?

　As shown on page 13 of the data sheet, one conversion time is 1 / DR = 1/1600 = 0.625ms

　It was calculated to be 0.65ms by adding about 25us of the power-up time described on page 17 to this.

   Is it correct?

④ In relation to the above, this and "Convergence time is 1 cycle" on page 1 of the data sheet,
　Page 12 "The ADS101x has a 1-MHz internal oscillator that is further divided by a factor of 4 to generate f MOD at 250 kHz."
　I don't really understand the relationship with. Could you teach me?

⇒My opinion is below

　I think it takes 3 to 4 conversion cycles for the digital filter conversion to settle, so

　Internally, I think that this conversion cycle is executed within 1 / DR (data rate) time.

Best Regards,

ttd

  • 0
    TI__Mastermind 40975 points

    Hi ttd,

    Please allow a delay on tech support because it's a holiday in US.

    Thanks&Regards,

    Dale

  • 0 in reply to Dale Li
    Mastermind 8280 points

    Hi Dale,

    Thank you for your reply.

    I'm looking forward  to your answers.

    Best Regards,

    ttd

  • 0 in reply to ttd
    Mastermind 8280 points

    Hi Dale,

    Do you have any update so far?

    It is preferable that noise is removed after AD conversion.

    However I'd like to understand the principle.

    Thank you for your cooperation.

    Best Regards,

    ttd

  • 0 in reply to ttd
    TI__Mastermind 31655 points

    Hi ttd,

    Thank you for your patience. I will get back to you by the end of the day tomorrow regarding this.

    Thanks,

  • 0 in reply to Scott Cummins
    TI__Mastermind 31655 points

    Hi ttd,

    1/2. The notches in the sinc filter are actually related to the output data rate of the sinc filter (fD) and not the modulator frequency (fmod), but 5Mhz is actually an integer multiple of the 1600SPS output data rate you have selected, so this is likely a result of one of those notches.(https://www.ti.com/lit/an/sbaa230/sbaa230.pdf?ts=1607548972722&ref_url=https%253A%252F%252Fwww.google.com%252F

    The datasheet does not mention any specifications for an analog input filter because there is actually not one included internally. Any analog input filtering would need to be added externally and the cutoff frequency and topology would be dependent on the application.It is recommended to add an external filter, however. It can be as simple as a single RC lowpass.

    3. Your calculation is correct.

    4. The internal oscillator generates a 1Mhz output, but the internal modulator was designed to run at a frequency of 250kHz. The relationship between the oscillator and the modulator frequency (fmod) is not particularly important. The key parameters are the fmod and the user-selectable data rate which determines the oversampling ratio of the device.

    I am not intimately familiar with the digital filter topology in this device, but for example a sinc1 filter will settle within a single conversion cycle, so it is likely that something similar is used internally.

    Regards,

  • 0 in reply to Scott Cummins
    Mastermind 8280 points

    Hi Scott Cummins,

    Thank you for your reply.

    I have one question.

    When input signal is not integral multiples of 1600SPS, is it possible that the noise has not been removed?

    Best Regards,

    ttd