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Original question:
With the question which part of the 24 bits in SPI mode is command and which is data, SPI operation is still not clear to me.
(in 10 month it is still not cleared in the datasheet)
8.5.1.1. handles SPI mode.
8.5.2.1. handles I2C mode.
Since that chapter is numbered up to 8.5.2.1.3 I assume all is about I2C.
Is chapter 8.6 about both SPI and I2C again?
And how do you control this DAC, which bit in D[23:16} does what?
Can you send configuration data with each DAC register data.
Or do you need to write all registers in as many SPI streams.
I do not use a processor but an FPGA and want a simple control.
Hi,
Apologies for the lack of clarity in datasheet regarding this.
First send the command byte (bit 23 to bit 16) then the data bits (bit 15 to bit 0).The DAC data is left-aligned, so the 16-bit device of course uses all of the lower two bytes but lower resolution products ( DAC70501 and DAC60501) would leave the LSBs empty.
Yes , chapter up to 8.5.2.1.3 is about I2C. ( sub section starts at 8.5.2.1)
Section 8.6 is for SPI register map and address details.
In I2C modes, each command byte is used to access the particular register. Say you want to access SYNC register in I2C modes, command bits will be 0010
Refer to the table below.
Regards,
AK
