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ADS1018-Q1: VDD=5V, how to choose FSR

Part Number: ADS1018-Q1
Other Parts Discussed in Thread: ADS1118, ADS1118-Q1

Dear team,

If we choose VDD=5V, then how do we choose FSR, 4.096 or 6.144, which is better? What is the relationship between VDD and FSR?

In addition, in my understanding the accuracy of the internal reference depends on the VDD's accuracy, right? If we use Buck DCDC to power the VDD, the ripple of the DCDC will influence the accuracy of internal reference, so it is better to use LDO to power the VDD, right?

Thanks & Best Regards,

Sherry

  • Hi Sherry,

    If your input signals are <4.096V, then it would make sense to choose FSR = 4.096V. If your input signals are >4.096V but <5V, then you could choose FSR = 6.144 V to get a little bit more dynamic range. Keep in mind that the input signals to the ADC are limited to VDD +0.3V, so you cannot actually apply a 6V signal to the ADS1018-Q1.

    It is always best practice to use a clean supply for an ADC, but this is less critical for a 12-bit ADC like the ADS1018-Q1. If the customer can add an LDO, that is certainly following best practices.

    -Bryan

  • Hi Bryan,

    Thanks for your reply!

    You said ''It is always best practice to use a clean supply for an ADC, but this is less critical for a 12-bit ADC like the ADS1018-Q1''. Could you please tell me why it is less critical for a 12-bit ADC?

    Thanks & Best Regards,

    Sherry

  • Hi Sherry,

    PSRR is not specified for the ADS1018-Q1. However, the 12-bit ADS1018-Q1 is based on the 16-bit ADS1118, using the same ADC construction and will have the same basic specifications. For the ADS1118-Q1, the offset power-supply rejection is typically 0.2 LSB/V at the 16-bit level. This is the equivalent of 0.2*1/16 LSB/V = 1/80 LSB/V at the 12-bit level. The ADS1118-Q1 also has a gain power-supply rejection of 10 ppm/V as a typical specification, which should be the same in the ADS1018-Q1.

    If the power supply noise was 20mV for example, this becomes 0.02*10ppm or 0.2ppm change in the gain. Similarly the offset power-supply rejection is 1/80 LSB/V or a change of 1/4,000 LSB for 20mV. Both of these changes are very small relative to the ADC's LSB size and therefore likely unnoticeable in the data. Note that these PSRR specs assume a DC input signal.

    However, there are a lot of variables about how switching noise might be seen by the ADC. The switching rate, the shape and rate of the switching pulse, etc. Also, there may be some noise that shows up on the analog inputs. Therefore, with switching supplies we have generally recommended using an LDO to clean up any switching noise from the supply. This way the ADC is isolated from the supply noise.

    -Bryan

  • Hi Bryan,

    Clear! Thanks for your detailed guidance which is very helpful!

    Thanks & Best Regards,

    Sherry