what is the maximum delay between the CLKOUTABM/P and CLKOUTCDM/P?
i thought it was 300ps but i can find out the information
if i want to use ads4449 pattern generator (especially ramp generator) for all channels, is there a way to guarantee that all ramp patterns will start at the same time? My concern is synchronize AB and CD flows inside a fpga.
I have already asked an equivalent question but it seems the answer was only about custom pattern
More generally, is there a way to have a same pattern (with different words) emitted synchronously on all channels with a delay between AB and CD channels which is the same as delay in normal operation?
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