The data sheet of the DDC316 states (page 12 table 2) that input signals >=100% FSR will result in ideal output code 0xFFFF.
If an input is supplied with a current that slightly exceeds >=100%FSR the output code is 0xFFFF.
But if the input current further rises to higher values e.g. >120%FSR the output code lowers to values < 0xFFFF.
This behaviour doesn't allow to precisely detect an overflow condition.
Is there any other possibility to detect the overflow?
Regards,
Bernhard