TINA/Spice/LM25119: PSPICE Model -- Gross Errors

I have recreated the netlist as accurately as I can tell (aside from the diodes being a different model I had handy, because who cares).  Schematic:

I've set the simulation parameters the same, and get the error,

[Warning] singular matrix:  check nodes b_bvccx\xic1#branch and b_bvccx\xic1#branch

[Error] doAnalyses: Timestep too small

This is more as an example, than a specific error I'm having trouble with.  If I get a singular matrix error, it seems to pick a node randomly.  (This may be a simulator problem.  I've noticed inconsistent behavior before.)

I've made numerous changes to the model over the last few weeks, converting PSPICE syntax and working to eliminate those terrible discontinuous IF statements.  At one point, I had it working without errors; there was no output.  Snooping around within the LM25119 SUBCKT, the CLK seems to drive all other functions, and it wasn't producing a signal.  I made this change,

.SUBCKT CLK_GEN RT CLK
IS1 0 RT 1U
XU4 6 5 RT VCR_1
XU6 4 3 RT VCR_0
DU5 4 3 DD1
C2 3 0 1U IC=1
*XU2 5 4 INV_0
XU2 5 4 BEH_NOT2 PARAMS: THRESHOLD=0 OUTRES=10m CDELAY=4p GAIN=1k VDD=12 VSS=-12
R5 6 0 1G
C1 6 0 1U IC=1
*XU3 5 3 CLK AND_0
XU3 5 3 CLK BEH_AND2 PARAMS: THRESHOLD=0 OUTRES=10m CDELAY=4p GAIN=10k VDD=3.5 VSS=0.3
*XU1 7 6 5 COMPARATOR_0
XU1 7 6 5 BEH_COMP2 PARAMS: OUTRES=10m CDELAY=4p GAIN=10k VDD=12 VSS=-12
R2 0 7 1K
R1 7 5 1K
.MODEL DD1 D (RS=0.1m N=0.1m)
.ENDS

Replacing the discontinuous statements with a continuous, formula-free equivalent.  Only the inverter is quoted below, but the others are constructed similarly.

.SUBCKT BEH_NOT2 A Y PARAMS: Threshold=2.5V OutRes=100 Cdelay=100p Gain=1k VDD=5.0 VSS=0.0
CA INA 0 {Cdelay}
CG GAIN VSS {Cdelay/5}
D1 VDIO 0 IDEALD TEMP=23
D2 GAIN VDIO_PR IDEALD TEMP=23
D3 0 INA IDEALD TEMP=23
D4 INA 0 IDEALD TEMP=23
D7 VDIO_NR GAIN IDEALD TEMP=23
E1 VDD VDIO_P VDIO 0 1.0
E2 GB VSS GAIN VSS 1.0
E3 VDIO_N VSS VDIO 0 1.0
G1 INA 0 A TH -1.0m
G3 GAIN VSS INA 0 1.0m
I1 0 VDIO 1.0m
RA INA 0 {1k*Gain^(1/2)}
RG GAIN VSS {1k*Gain^(1/2)}
RD2 VDIO_P VDIO_PR 1.0
RD7 VDIO_N VDIO_NR 1.0
RY GB Y {OutRes}
VTH TH 0 {Threshold}
VVDD VDD 0 {VDD}
VVSS VSS 0 {VSS}
.MODEL IDEALD D ( IS=1p N=1.8 RS=1m XTI=0 )
.ENDS

This yielded a working CLK_GEN subcircuit:

(clk2 and rt2 are from the SUBCKT above, while the other waveforms come from a schematic equivalent model of CLK_GEN.  There is a small timing difference, but they both operate effectively at least.)

 The rest of the LM25119 is not working at this time.  There are many, many statements left to convert.

As you might surmise, my suspicion is the abundance of discontinuous statements.  AFAIK, those are bad enough even in PSPICE, but they're utterly unworkable in anything else.  They certainly preclude GEAR integration, necessary for obtaining usefully clean switching waveforms.

Tim