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C6678 CSL GPIO Interrupt Problems

I am having trouble getting triggering a GPIO interrupt on any GPIO other than GPIO_0.  I started with the sample code provided by Steven Ji (http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/171824.aspx).  It works great for GPIO_0 as an output.  I need to capture GPIO_1 and GPIO_2 as inputs, both rising edge.  Since I'm getting the GPIO_0 interrupt when I set the output, I am fairly certain I have the interrupt itself running properly, but I can't get an interrupt on the other I/O.  I even tried to add GPIO_3 as an output, also triggered on rising edge, but it doesn't call the ISR either.  Only GPIO_0 does.

I've checked the registers, and the "bank_registers_intstat" (in CCS) shows that my other GPIO bits are being detected, but no ISR call.

I'm using event 90 (GPINTn).  Is that not the correct event number for GPIO interrups in general?  Are there separate event numbers for each bit in the GPIO?

My GPIO setup code looks like this:

hGpio =CSL_GPIO_open (0);
CSL_GPIO_clearOutputData (hGpio, 0);
CSL_GPIO_setPinDirOutput (hGpio, 0);
CSL_GPIO_clearOutputData (hGpio, 3);
CSL_GPIO_setPinDirOutput (hGpio, 3);

CSL_GPIO_setPinDirInput (hGpio, 1);
CSL_GPIO_setPinDirInput (hGpio, 2);

CSL_GPIO_setRisingEdgeDetect (hGpio, 0);
CSL_GPIO_setRisingEdgeDetect (hGpio, 3);
CSL_GPIO_setRisingEdgeDetect (hGpio, 1);
CSL_GPIO_setRisingEdgeDetect (hGpio, 2);
// Enable GPIO per bank interrupt for bank 0
CSL_GPIO_bankInterruptEnable (hGpio, 0);

 

My interrupt setup looks like this (minus error checking on function return values):

intcContext.eventhandlerRecord = EventHandler;
intcContext.numEvtEntries      = 10;
CSL_intcInit (&intcContext);
CSL_intcGlobalNmiEnable ();
CSL_intcGlobalEnable (&state);
vectId =CSL_INTC_VECTID_4;
hTest = CSL_intcOpen (&intcObj, 90, &vectId, NULL);
EventRecord.handler = &intIsr;
EventRecord.arg = 0;
CSL_intcPlugEventHandler (hTest, &EventRecord);
CSL_intcHwControl (hTest, CSL_INTC_CMD_EVTENABLE, NULL);
 
Any help would be greatly appreciated.
  • Dummy me.  I misunderstood the GPINTn event, thinking it was a single event that was triggered for _any_ GPIO interrupt.  Re-reading the footnote in the data manual, I see that it directs the GPINTn to CorePac[n].

    I switched my GPIO to use 14 and 15, and used events 88 and 89, and things are running as I expected them to.

     

  • HI, My name is Ryan.

    Have you fixed it?

    I have same problem like mentioned.

    Could you check my code?

    Thanks a lot.

    -----------------------------------------------------------------------------------------------------------------

    #include "ti/csl/csl_chip.h"
    #include "ti/csl/csl_chipAux.h"
    #include "ti/csl/src/intc/csl_intc.h"
    #include "ti/csl/csl_gpio.h"
    #include "ti/csl/csl_gpioAux.h"

    #include <stdio.h>

    CSL_IntcContext intcContext;
    CSL_IntcEventHandlerRecord EventHandler[30];
    CSL_IntcObj intcObj;
    CSL_IntcHandle hTest;
    CSL_IntcGlobalEnableState state;
    CSL_IntcEventHandlerRecord EventRecord;
    CSL_IntcParam vectId;

    CSL_GpioHandle hGpio;


    volatile int a = 0;

    interrupt void intIsr()
    {
    a = 1;

    return ;
    }

    void main(void)
    {
    //GpioInit(); //GPIO Initialization
    int pinNum;
    int bankNum;

    /************************************************
    *************** INTC Configuration *************
    ************************************************/

    printf ("Debug: GEM-INTC Configuration...\n");

    /* INTC module initialization */
    intcContext.eventhandlerRecord = EventHandler;
    intcContext.numEvtEntries = 10;
    if (CSL_intcInit(&intcContext) != CSL_SOK)
    {
    printf("Error: GEM-INTC initialization failed\n");
    return;
    }

    /* Enable NMIs */
    if (CSL_intcGlobalNmiEnable() != CSL_SOK)
    {
    printf("Error: GEM-INTC global NMI enable failed\n");
    return;
    }

    /* Enable global interrupts */
    if (CSL_intcGlobalEnable(&state) != CSL_SOK)
    {
    printf ("Error: GEM-INTC global enable failed\n");
    return;
    }

    /* Open the INTC Module for Vector ID: 4 and Event ID: 90 (GPIO_n in C6678)*/
    vectId = CSL_INTC_VECTID_4;   // <=== do I have to change this for testing gpio 15 instead of gpio 0?
    hTest = CSL_intcOpen (&intcObj, 89, &vectId , NULL); //  <=== do I have to change this event id(90) for testing gpio 15 instead of gpio 0?
    if (hTest == NULL)
    {
    printf("Error: GEM-INTC Open failed\n");
    return;
    }

    /* Register an call-back handler which is invoked when the event occurs. */
    EventRecord.handler = &intIsr;
    EventRecord.arg = 0;
    if (CSL_intcPlugEventHandler(hTest,&EventRecord) != CSL_SOK)
    {
    printf("Error: GEM-INTC Plug event handler failed\n");
    return;
    }

    /* Enabling the events. */
    if (CSL_intcHwControl(hTest,CSL_INTC_CMD_EVTENABLE, NULL) != CSL_SOK)
    {
    printf("Error: GEM-INTC CSL_INTC_CMD_EVTENABLE command failed\n");
    return;
    }

    printf ("Debug: GEM-INTC Configuration Completed\n");

    // 1. Init Flag
    a = 0;
    printf("a = %d\n",a);

    // 2. Trigger GPIO_0 in Core0
    pinNum = 15;
    bankNum = 0;

    // Open the CSL GPIO Module 0
    hGpio = CSL_GPIO_open (0);

    // Set GPIO pin number 0 as an output pin
    CSL_GPIO_setPinDirOutput (hGpio, pinNum);

    // Set interrupt detection on GPIO pin 0 to rising edge
    CSL_GPIO_setRisingEdgeDetect (hGpio, pinNum);

    // Enable GPIO per bank interrupt for bank zero
    CSL_GPIO_bankInterruptEnable (hGpio, bankNum);

    // Toggle GPIO_0 pin to trigger GPIO interrupt
    CSL_GPIO_clearOutputData (hGpio, pinNum); //GPIO_0=0
    CSL_GPIO_setOutputData (hGpio, pinNum); //GPIO_0=1


    // 3. Wait for entering into ISR
    while(a!=1){}


    printf("a = %d\n",a);
    printf("GPIO interrupt occurs\n");

    return 0;