This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

C6678 DDR3 leveling configuration

I have some problem setting the registers for the DDR3 Leveling

i've seen that after the inizialization the IFRDY bit in DDR3 Memory Controller Status Register always remains 0 and i think is a problem of the initial leveling settings

I'm trying to use the spread sheet DDR3_PHY_Calc. I should write 8 clock lane lenght but i have only 2 of them and all value in column G from row 12 is marked in red. (I'm using a DDR3 SDRAM SODIMM MT16JTF1G64HZ – 8GB so i have only CK0 and CK1 pairs)

This is my spreadsheet

5050.2376.DDR3 PHY Calc v10.xlsx

Any advice?

  • Hi Gabriele,

    It sounds like you have entered the length from the SOC to the connector. You will need to include the lengths of the signals on the SODIMM. Check with the manufacturer but the SODIMM probably follows the JEDEC standard for trace lengths. You will need to add the lengths between the SOC and the connector to the lengths on the SODIMM for all the signals.

    Currently you have included the length of the DDRCLKOUT0 to the first byte lane and the length of the DDRCLKOUT1 to the second byte lane. This is incorrect. DDRCLKOUT0 is connected to all the memory devices of the first rank and DDRCLKOUT1 is connected to all the memory devices in the second rank. The necessary length for byte 0 is the length of DDRCLKOUT0 to the connector plus the length from the connector to the first part on the SODIMM. The length for the second byte is the the length of DDRCLKOUT0 to the connector plus the length from the connector to the second part on the SODIMM. This is repeated for the rest of the bytes on the SODIMM.

    You've selected a dual-rank SODIMM. Remember that address mirroring is not supported for dual-rank SODIMMs.  Check with the manufacturer to see if this SODIMM is using address mirroring. All the standard configurations currently only support single-rank SODIMMs. Dual-rank requires some special configuration. I would suggest you bring up the board with a single-rank SODIMM initially.

    Regards,