Hi,
We are building an I2C command channel between DM388 and a FPGA over I2C2, with the FPGA in the master role and DM388 as the slave. Our project uses IPNC 3.8 as the reference code base.
The issue we currently encountered is that although we can see the proper signal going over the I2C2_SDA wire, the expected interrupt never got triggered when the master issued an I2C_WRITE.
The following is a summary of what we have done so far to enable DM388 as I2C slave:
1. in psp_i2cdrv.c, we configured I2C2 with the parameters .isMasterMode = FALSE, .i2cOwnAddr = 0x20, and .opMode = I2C_OPMODE_INTERRUPT (the overlay I2C2 registers of I2C_CON and I2C_OA have been checked to make sure that appropriate values are set in those registers)
2. we reviewed soc_TI814x.h and found that CSL_INTC_EVENTID_I2CINT2 is set to 42u
we enabled the code in iss_platformTI814x.c so the following is called to route the IRQ properly,
int_mux = REG32(CSL_TI814x_CTRL_MODULE_BASE + 0x0f64);
/* I2CINT2 value = 4, INT_MUX_19_SHIFT = 24 */
int_mux |= (4 << 24);
REG32(CSL_TI814x_CTRL_MODULE_BASE + 0x0f64) = int_mux;
3. we placed a debug statement on top of i2c_isr() in psp_i2cdrv.c, so we may be alerted when I2C_WRITE triggers the interrupt
But the I2C_WRITE never triggers the Vps_printf in i2c_isr(). What else must be done to enable I2C_WRITE triggering the interrupt?
Thanks!