Dear All,
I would like to use the wait pin0 of DM385 GPNC NAND in IPNCSDK_3.8.0.
SDK : IPNCSDK_3.8.0.
SoC : DM385
NAND : Spansion Nand 2Gbit (Part Number : S34ML02G1)
The DM385 NAND Driver setting in IPNCSDK_3.8.0 is as below.
IPNCSDK_3.8.0/Source\ti_tools\ipnc_psp_arago/arch/arm/mach-omap2/board-flash.c
static struct omap_nand_platform_data board_nand_data = {
.nand_setup = NULL,
.gpmc_t = &nand_timings,
.dma_channel = -1, /* disable DMA in OMAP NAND driver */
.dev_ready = NULL,
.bussize = NAND_OMAP_BUS_8
};
and
/IPNCSDK_3.8.0/Source\ti_tools\ipnc_psp_arago/kernel/drivers/drivers/mtd/nand/omap2.c
/*
* If RDY/BSY line is connected to OMAP then use the omap ready
* funcrtion and the generic nand_wait function which reads the status
* register after monitoring the RDY/BSY line.Otherwise use a standard
* chip delay which is slightly more than tR (AC Timing) of the NAND
* device and read status register until you get a failure or success
*/
if (pdata->dev_ready) {
info->nand.dev_ready = omap_dev_ready;
info->nand.chip_delay = 0;
} else {
info->nand.waitfunc = omap_wait;
#ifndef CONFIG_TI8148_EVM_OPTIMIZED
info->nand.chip_delay = 50;
#else
info->nand.chip_delay = 22;
#endif
}
so delay function(chip_delay = 50) is excuted when reading data from NAND.
I woud like to use omap_dev_ready function(wait pin mointering) instead of delay function(chip_delay = 50).
Do you have patch for using the wait pin0(WAIT pin is monitored for read accesses) of DM385 GPNC NAND in IPNCSDK_3.8.0
or
Please let me know how to read data using the wait pin0(WAIT pin is monitored for read accesses) of DM385 GPNC NAND in IPNCSDK_3.8.0
highly appreciated.