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PCA9306: Question about operating the translator

Part Number: PCA9306

Hi team,

My customer would like to use this part in the following configuration, and I have 2 questions regarding it-

'

VREF1: 1.8VDC

VREF2: 2.8VDC

 

I want to use the enable pin to control the state of level translator. Can I use a 3.3VDC GPIO control on enable when my VREF2 is 2.8VDC or do I have to level shift the control signal?

I know that the control voltage is within the absolute max voltage rating for the enable pin but is the voltage somehow linked to VREF2?
"

1. I don't believe they can use the 2.8V on the VREF2, if they have 1.8V at VREF1 I think they can only have VREF2 at 2.5-V, 3.3-V, or 5-V. Not 2.8V. Can you confirm?

2. Everything I am seeing on E2E looks like they cannot have separate voltages at VREF2 and EN, they must be connected and have the resistor at that connection. Can you confirm that as well?



Thanks,

Lauren

  • 1. All voltages are allowed, as long as there is a difference of more than 0.8 V between VREF1 and VREF2.

    2. VREF2 and EN must be connected, and there must be a resistor between VREF2 and the higher supply. EN must be driven with an open-drain output, so the voltage of the GPIO does not matter. See [FAQ] How do the LSF translators work?

  • Hi Lauren,

    As Clemen's pointed out, the Vref2 being 2.8V is acceptable. We suggest having Vref2 being larger than Vref1 by atleast 0.7V to make use of the device as a translator. 

    For your second point, Clemen's is correct. If you want to control the enable pin, you can connect your GPIO as a tri-state output (HI-Z) to have it enabled and drive the enable low when you wish to disable it. You should not drive the enable pin HIGH though.

    -Bobby