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# THVD1410: How can I determine the generation of RS485 transceivers

Part Number: THVD1410
Other Parts Discussed in Thread: SN65HVD82

I have found a lot of incosistent document in this theme. I would like to clarify them.

1. First time, I need have clarify the typos in documents. Please confirm that TI's guide has a lot of typos.

Table 1:

"–0.2 V < VAB < 0.01 V" => "–0.2 V < VAB < -0.01 V"

"–0.2 V < VAB < 0.07 V" => "–0.2 V < VAB < -0.07 V" by Vit+,max + Vhys,min at Z-gen

"which is almost three times the noise immunity of legacy devices with external biasing." => I can not see this in example of Figure 1.

What I see

X-gen: it has Vnoise,pp=200mV, at Vhys,min=50mV; Vit+=+200mV; Vab,in=+250mV biasing => (50+50)*2

Y-gen: it has Vnoise,pp=170mV at Vhys,min=35mV; Vit+=-10mV; Vab,min=+40mV biasing => (45+40)*2

Z-gen: it has Vnoise,pp=140mV at Vhys,min=50mV; Vit+=-20mV; Vab,min=N/A => (20+50)*2

Of course, I agree, everything depends on that what Vhys,min means at boundary of 200mV. In my terminology, receiver output is not changed until voltage level reaches the level of "Vit+ - Vhys"

2. Is THVD1410 included in Z-generation group?

"When the differential input signal is close to zero, it is still above the VTH+ threshold, and the receiver output will be High. Only when the differential input is more than VHYS below VTH+ will the receiver output transition to a Low state. Therefore, the noise immunity of the receiver inputs during a bus fault conditions includes the receiver hysteresis value, VHYS, as well as the value of VTH+."

3. Is SN65HVD3082 included in Y-generation group?

"When the differential input signal is close to zero, it will still be above the VIT+ threshold, and the receiver output is High. Only when the differential input is more negative than VIT– will the receiver output transition to a Low state. So, the noise immunity of the receiver inputs during a bus fault condition includes the receiver hysteresis value VHYS (the separation between VIT+ and VIT– ) as well as the value of VIT+."

Maybe this is typo: "Only when the differential input is more negative than VIT–" => Are you thinking "Only when the differential input is more negative than VIT+-VHYS (VHYS below VIT+)"?

4. SN65HVD72DR is Z-gen part (said by Ti's guide). It is correct definition and picture.

"When the differential input signal is close to zero, it is still above the maximum VIT+ threshold of –20 mV, and the receiver output will be high. Only when the differential input is more than VHYS below VIT+ will the receiver output transition to a low state. Therefore, the noise immunity of the receiver inputs during a bus fault condition includes the receiver hysteresis value, VHYS, as well as the value of VIT+."

Figure 22.

5. SN65HVD82DR is Z-gen (said by Ti's guide)

"When the differential input signal is close to zero, it will still be above the VIT+ threshold, and the receiver output will be High. Only when the differential input is more negative than VIT– will the receiver output transition to a Low state. So the noise immunity of the receiver inputs during a bus fault condition includes the receiver hysteresis value VHYS (the separation between VIT+ and VIT– ) as well as the value of VIT+."

You can see, that definition the same with SN65HVD3082, but Figure 20 description is opposite with this.

Second, typical and worst case minimum values of Vhys are mixed. It is very confusing.

SN65HVD82 Robust RS-485 Transceiver datasheet (Rev. B) (ti.com)

This part has value of 40mV for Vhys,min. So this part has only noise immunity of 120mV. SN65HVD72DR is better in real life.

References:

RS-485 failsafe biasing: Old versus new transceivers (ti.com)

THVD14xx 3.3-V to 5-V RS-485 Transceivers with ±18-kV IEC ESD Protection datasheet (Rev. E)

SNx5HVD308xE Low-Power RS-485 Transceivers, Available in a Small MSOP-8 Package datasheet (Rev. J) (ti.com)

SN65HVD7x 3.3-V Supply RS-485 With IEC ESD protection datasheet (Rev. H)

SN65HVD82 Robust RS-485 Transceiver datasheet (Rev. B) (ti.com)

Attila

• Attila,

The terminology might sound a bit confusing. Basically Gen X follows RS-485 standard, Vit+=200mV, Vit-=-200mV. Gen Y and Z shifts it Vit+ to below 0V to obtain the 'failsafe' feature. Between Y and Z, Z specifies the minimum hysteresis level, while Y only provides a typical value. Based on this definition,

Gen Y: THVD14xx, SNx53082E

Gen Z:  SN65HVD7x, SN65HVD82

When input signal toggles from high to low, the region that the receiver doesn't change is from Vit+ to Vit+-Vhys. Similarly when input goes from low to high, the output stays the same before reaching Vit-+Vhys.

In the example of SNx53082E,

"Only when the differential input is more negative than VIT+-VHYS (VHYS below VIT+)"?

Real Vit+ of each silicon varies (-20mV is guaranteed with all process, temperature and voltage variations), meaning Vit+-Vhys varies too. Minimum Vit- (-200mV) is the only value is guaranteed to work for all silicons.

• Could you refer the typos? What is wrong and what is my misstake?

I don't understand why TI's guide talk about 3 times better noise immunity at Z-gen, when I see 250mV at X-gen, 170mV at Y-gen and 140mV at Z-gen example.

• There are several definitions here: minimum fail-safe voltage VAB(min) and noise immunity, peak to peak noise level.

With 50mV noise level, VAB(min) are 250mV, 40mV and 30mV of Gen X, Y, Z.

Again, only Gen Y and Z have the fail-safe feature (RX=H with open/idle/short bus). Assume the noise common mode is 0V, the noise immunity is 50mV =2x|-10mV-15mV|, assume 15mV min Vhys of Gen Y, while it's 140mV of Gen Z.

Generally speaking larger Vhys has better noise immunity, especially with a min Vhys spec. Nevertheless the most system design is based on Vit+/Vit-.

• 1.

With 50mV noise level, VAB(min) are 250mV, 40mV and 30mV of Gen X, Y, Z.

Where VAB(min)=30mV come from at Z-gen? It should be zero => no failsafe biasing at Z-gen!

2.

Assume the noise common mode is 0V, the noise immunity is 50mV =2x|-10mV-15mV|, assume 15mV min Vhys of Gen Y, while it's 140mV of Gen Z.

I don't agree with this explain in aspect of 3 times noise immunity. You compare them as non-biased Y and Z-gen devices. It is true.

But the originate TI guide compares X/(Y???)/Z-gen in that example as X/Y-gen is failsafe biased and Z-gen is non-biased.

"Z-gen devices is almost three times the noise immunity of legacy devices with external biasing"

If legacy device only means X-gen, and VAB=250mV as in the example, then we are talking about 100mV noise immunity. You has confirmed at the beggining, that all of devices will only changed the output level under VITplus - VHYS level. So X-gen devices with 250mV bias will be good until 150mV, which means 2x100mV=200mVpp noise voltage (in other words 100mV noise immunity)

But if we are talking 200mV biasing as minimum requirement for legacy devices (X-gen) and legacy device has VHYS is 50mV, then the result is 100mVpp allowable noise maximum on biased voltage.

This legacy device noise level of 100mVpp and Z-gen noise level of 140mV are not 3 times values!!!!

Alright, VHYS=50mV and 35mV are typical data from datasheet at X/Y-gen devices. In my side, it can not shrinking them as you did it at Y-gen device.

It could be informative me, values of min VHYS for X and Y devices for better understanding.

My final conclusions.

It is very important to clarify definition of "noise immunity". In my terminology, it means distance of VAB and VITplus-VHYSmin of device, not peak to peak noise voltage.

It is very important clarify, what legacy devices means (only X, or X/Y together).

3.

I did not get any response about typos of documents.

4.

SNx53082E

I think this is typo and you are thinking to SNx5HVD3082E above.

5.

Real Vit+ of each silicon varies (-20mV is guaranteed with all process, temperature and voltage variations), meaning Vit+-Vhys varies too. Minimum Vit- (-200mV) is the only value is guaranteed to work for all silicons.

Are you thinking to Z-gen devices here?

• 1. Vmin(AB)=30mV with a 50mV noise. With 0V noise, both gen Y and Z don't need external fail-safe bias, but gen Y has less margin.

2. You're correct. The legacy devices refer to gen X. Personally I don't think it makes sense to compare the "noise immunity" between gen X and gen Y/Z, since the noise common mode are different. I'm OK with the way you define the 'noise immunity'. Since gen Y/Z are fail-safe, the peak-2-peak noise around 0V can make sense. I'm sorry there is no data of the minimum of Vhys of gen X and Y. My take is that the system can be designed with the noise voltage and min Vhys (when it's available) for more margins.

3. I agree the values are typos.

4. You're right I meant SNx5HVD3082E.

5. I meant all gen X/Y/Z. The Vhys gives some margin within the grey area, while Vit+ and Vit- are hard bands.

• Please confirm the good values for Table 1.

Wrong => Corrected

Y-gen: "–0.2 V < VAB < 0.01 V" => "–0.2 V < VAB < -0.01 V"

Z-gen: "–0.2 V < VAB < 0.07 V" => "–0.2 V < VAB < -0.02 V"

Here is my final conclusion:

TI's guide talks about 50mV offset biasing in the examples at X/Y-gen devices, but the TI's final conclusion about comparing the noise immunity doesn't depend on examples.

3 times noise immunity at Z-gen devices values come from legacy x-gen device base real values: Vhys,min is half of Vhys,typ. Vab(min)=200mV is mandatory. So X-gen device with value of Vhys,typ=50mV could withstand 2*25mV=50mVpp noise. Where Vhys,min=50mV/2=25mV

Comparing Y and Z-gen is similar. Vhys,min is half of Vsys,typ. Without biasing it means Vhys,min=15mV. Because Vit+=-10mV, so Y-gen device could withstand 2*25mV=50mVpp noise too.

Z-gen devices could withstand 2*(20mV+50mV)=140mVpp noise.
So X/Y/Z-gen noise pk2pk values shows 50mV/50mV/140mV.
So Z-gen devices are 3 times better noise immunity to compare them to X/Y, next to X-gen 200mV biasing, Y-gen non-biasing, Z-gen non-biasing.

• Thanks for providing your correction for the table. I will change the values in the next round of document update.

I agree with your explanation. Such 'noise immunity' comparison between gen X and gen Y/Z is meaningful as long as different common mode voltage is accepted. I'm curious what your application looks like and how you design your system based this information.

• My application is Access Controllers and RFID/NFC reader with OSDP protocol, where C&D/Wiegand/OSDP interafces are multi configurable interface from the board (common pins, different interfaces). For simple hardware interface, it is mandatory to use Y, or Z-gen devices (Z-gen is better to us), because we could leave out biasing resistors, which are conflicted with C&D/Wieg interface pullup resistors. Slave RS485 interface of PAC controller could be better too with using Y, or Z-gen devices. It is possible to avoid using of biasing jumpers at master/slave network devices. That's all.

I agree, a lot of TI documentations have typos. That's why I was openining this thread.

Thanks for support.

Attila

• Attila,

Thanks for your information and looking into the technical detail. Wish the best for your design. Again I will update the document.