Other Parts Discussed in Thread: TEST2
Hi,
I used the SN65DSI86 Register calculation excel file to calculate register values for my eDP panel, but keep getting link training failed bit turned on.
Also, I'm unable to bring up the color bar test pattern.
My current hardware setup is: Panel -> SN65DSI86 Eval board -> RasPi CM4.
I'm trying to get the test pattern working between the panel and the eval board first before I get the DSI side working.
This is the i2c code I'm currently using to setup the registers:
#!/bin/sh #Disable ASSR for Standard DP #i2cset -y 1 0x2C 0xFF 0x07 #i2cset -y 1 0x2C 0x16 0x01 #i2cset -y 1 0x2C 0xFF 0x00 #Refclk to 27Mhz i2cset -y 1 0x2C 0x0A 0x06 #DSI mode - single channel, 4 lanes i2cset -y 1 0x2C 0x10 0x26 #DSIA clk i2cset -y 1 0x2C 0x12 0x59 #Enable enhanced frame - No ASSR #i2cset -y 1 0x2C 0x5A 0x04 #Enable enhanced frame - ASSR i2cset -y 1 0x2C 0x5A 0x05 #Number of DP lanes to 2 i2cset -y 1 0x2C 0x93 0x20 #DP Datarate to HBR i2cset -y 1 0x2C 0x94 0x80 #Enable PLL i2cset -y 1 0x2C 0x0D 0x01 sleep 0.01 #Enable ASSR for eDP panel i2cset -y 1 0x2C 0x64 0x01 i2cset -y 1 0x2C 0x74 0x00 i2cset -y 1 0x2C 0x75 0x01 i2cset -y 1 0x2C 0x76 0x0A i2cset -y 1 0x2C 0x77 0x01 i2cset -y 1 0x2C 0x78 0x81 sleep 0.01 #Start Semi-auto link training i2cset -y 1 0x2C 0x96 0x0A sleep 0.02 #CHA active line length low i2cset -y 1 0x2C 0x20 0x80 #CHA active line length high i2cset -y 1 0x2C 0x21 0x07 #CHB active line length low i2cset -y 1 0x2C 0x22 0x00 #CHB active line length high i2cset -y 1 0x2C 0x23 0x00 #Vertical active size low i2cset -y 1 0x2C 0x24 0x38 #Vertical active size high i2cset -y 1 0x2C 0x25 0x04 #Horizontal pulse width i2cset -y 1 0x2C 0x2C 0x30 #Hsync polarity i2cset -y 1 0x2C 0x2D 0x00 #Vertical pulse width i2cset -y 1 0x2C 0x30 0x12 #Vsync polarity i2cset -y 1 0x2C 0x31 0x00 #HBP i2cset -y 1 0x2C 0x34 0x58 #VBP i2cset -y 1 0x2C 0x36 0x0B #HFP i2cset -y 1 0x2C 0x38 0x18 #VFP i2cset -y 1 0x2C 0x3A 0x03 #DP-24BPP RGB i2cset -y 1 0x2C 0x5B 0x00 #DP-18BPP RGB #i2cset -y 1 0x2C 0x5B 0x01 #Color bar enabled i2cset -y 1 0x2C 0x3C 0x10 #Color bar disabled #i2cset -y 1 0x2C 0x3C 0x00 #Enhanced frame, Vstream enable #i2cset -y 1 0x2C 0x5A 0x0C #Enhanced frame, Vstream enable ASSR i2cset -y 1 0x2C 0x5A 0x0D exit 0
And the i2c dump:
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef 00: 36 38 49 53 44 20 20 20 02 00 86 00 00 01 00 00 68ISD ?.?..?.. 10: 26 00 59 00 00 00 00 00 00 00 00 00 00 00 00 00 &.Y............. 20: 80 07 00 00 38 04 00 00 00 00 00 00 30 00 00 00 ??..8?......0... 30: 12 00 00 00 58 00 0b 00 18 00 03 00 10 00 00 00 ?...X.?.?.?.?... 40: 01 00 00 00 80 00 20 08 58 04 88 00 1d 00 30 00 ?...?. ?X??.?.0. 50: 12 00 80 07 38 04 20 00 40 e4 0d 00 10 00 00 00 ?.??8? .@??.?... 60: a0 60 a4 00 00 00 00 00 00 00 00 00 00 00 00 00 ?`?............. 70: 00 00 00 00 00 01 02 00 80 00 00 00 00 00 00 00 .....??.?....... 80: 00 00 00 00 00 00 00 00 00 1f 7c f0 c1 07 1f 7c .........?|????| 90: f0 c1 07 20 80 00 00 04 01 00 00 00 00 00 00 00 ??? ?..??....... a0: 01 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 ?............... b0: 04 78 ac ac 08 6c 9c 9c 0c 5c 5c 5c 0c 0c 0c 0c ?x???l???\\\???? c0: 3f 3f 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 ???............. d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ f0: 02 02 00 00 09 02 00 00 02 00 00 00 00 00 00 00 ??..??..?.......
Datasheet of the eDP panel I'm using:
Orient Display AFV19201080A0-15.6N12NTN.pdf
Any help or hint would be much appreciated.