• State Resolved
  • Locked Locked
  • Replies 6 replies
  • Subscribers 32 subscribers
  • Views 240 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMDS181: Input and output performance of TMDS181

HIDETOSHI TAMIYA
Prodigy 60 points
Part Number: TMDS181

Hi team,

We are considering using the TMDS181 in ReTimer mode with a data rate of 1.48Gbps. I would like to know the following two points about above operation condition.

1.1.48Gbps input mask opening value
In Figure 13 (Input Eye Mask Post EQ - TTP2_EQ), the values in ps such as -33.7ps are for 6.0Gbps operation. What are the values of the voltage and time axes of the mask opening when operating at 1.48Gbps?

2.1.Maximum output jitter at 48Gbps operation
The maximum output jitter value when operating in ReTimer mode described in the datasheet is only for the condition of 3.4Gbps or higher. What is the maximum output jitter value for ReTimer mode in 1.48Gbps operation?

Best regards,

H.Tamiya

  • 0
    TI__Guru**** 166351 points

    H.Tamiya

    Do you have a copy of the HDMI1.4b spec? Both the 1.48Gbps input mask opening value and max jitter will be in section 4.2.4 HDMI Source TMDS Characteristics of the spec.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Prodigy 60 points

    Hi David

    Thank you for your answer.
    I checked a copy of the HDMI1.4b spec.
    For confirming My recognition, Please let me ask an additional question.

    About jitter of the output signal
    Reading from the mask in "Figure 4-30 Eye Diagram Mask at TP1 for Source Requirements" in 4.2.4, is it sure that the maximum jitter value of the TMDS181 output signal is 0.3UI?
    I recognize that the mask described in 4.2.4 is for the transmit component output.
    If 0.3UI is the maximum jitter value of TMDS181 as described above, it is thought that the mask is violated when the signal is degraded by the board pattern and receptacle connector.
    Is my understanding about that right?


    About input mask
    Is it correct that the input signal mask is also the same as the mask in Figure 4-30 described in 4.2.4?
    For an input signal, I thought it is the mask described in the chapter "4.2.5 HDMI Sink TMDS Characteristics", but is it not?

    Best regards,
    Tamiya

  • 0 in reply to HIDETOSHI TAMIYA
    TI__Guru**** 166351 points

    Tamiya-san

    If you look at Figure 4-29, the eye mask requirement is defined at TP1. The TP1 represents the connection point of the receptacle. So the mask is not the transmit component output.

    For the input, it is the mask requirement at TP2 and shown in Figure 4-32, because this is eye the TMDS181 input needs to tolerate.

    Thanks

    David 

  • 0 in reply to David (ASIC) Liu
    Prodigy 60 points

    Hi David,

    thank you for your checking.
    I understood that TP1 is defined at the transmit receptacle and TP2 is defined at the receive receptacle.
    I also understood that the values defined in TP1 and TP2 are not component specifications.

    In that case, please tell me what is the value of maximum output jitter of TMDS181.

    Best regards,
    Tamiya

  • +1 in reply to HIDETOSHI TAMIYA
    TI__Guru**** 166351 points

    Tamiya-san

    I do not have the maximum output jitter at the component specification. If you look at the max output jitter in the data rate for data rate greater than 3.4G, it followed the HDMI2.0 specification. So data rate of 1.48Gbps, we need to follow the HDMI1.4 spec.

    Thanks

    David 

  • 0 in reply to David (ASIC) Liu
    Prodigy 60 points

    Hi David,


    Thank you for the information.

    Best regard,
    Tamiya