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Original question:

TMDS181: No output in PIN Strap mode

TMDS181: TMDS181 Input Signal Quality Monitor Question

Qiang Ren
Intellectual 1725 points
Part Number: TMDS181

Hello team,

My customer is using the TMDS181 and has some questions. Could you please help with it? Thank you!

When soldering the device in their factory, they may connect the RXin0+ to the GND, but they enabled the adaptive EQ, so the eye height is ok when the RXin0+ is connected to the GND, We want to find the bad board by reading the register.

I think there are two ways:

1. Disable the adaptive EQ and fix the EQ value, read back the eye. We just need to set the 0xa0's  bit5 to 0. Is that right?

2. Or we can keep the adaptive EQ function and read back the CTLE value. But I can't find the CTLE value register in the DS. Can you send me the register to read the CTLE value?

Thank you!

  • 0
    TI__Guru**** 166681 points

    Hi,

    Can you see if the DESKEW_CMPLT bit ever set to 1 in the failing case?

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    TI__Intellectual 1725 points

    David,

    In the failing case, this bit is 1. In the good case, this bit is 0.

    Need to check:

    1. What is this bit used for, what module does it deskew?

    2. Why is this bit 1 in the bad case?

    Thank you very much!

  • 0 in reply to Qiang Ren
    TI__Guru**** 166681 points

    Hi,

    When the TMDS181 is in the retimer mode, it will de-skew the inter-pair skew between the input data lanes. The DESKEW_CMPLT bit will be set to 1 when the TMDS181 completes the de-skew process.

    There is no register to read the input pin being shorted to GND. I was hoping that the DESKEW_CMPLT bit will remain at 0 if the input pin being shorted to GND and use it as an indication, but from the result, it does not look this is to be the case.

    Thanks

    David