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DP83867IR: How to get the results from loopback tests?

Part Number: DP83867IR

Hello,

I have a custom board with the Xilinx ZYNQ7000 XC7Z020 chip running petalinux, and a DP83867 as the physical layer for the ethernet connection.

The petalinux system detects eth0, and when I connect a link partner to it, the auto-negotiation is completed and the link is up. I can configure the IP address (let's say 169.254.0.2), the netmask and the broadcast. However, I am not able to ping this partner (IP 169.254.0.1, same netmask and broadcast).

I am not able to figure out where is the problem. I am trying to narrow down the issue doing the loopback tests described in the troubleshooting. But it is a little confusing:

THe first step I do is to boot petalinux in the core. Then, I start thee u-boot environment, so I can read/write registers.

Then, for example, for the near-end loopback test, I set

Reg 0x001f to 0x8000

Reg 0x0000 to 0x0140

Reg 0x0032 to 0x00d3

Reg 0x0016 to 0x004

Reg 0x001f to 0x4000

then y set the ipaddr environment variable (setenv ipaddr 169.254.0.2)

And I try to ping 169.254.0.2 from the u-boot environment (NOT from the link partner): 

ping 169.254.0.2
ethernet@e000b000 Waiting for PHY auto negotiation to complete......... TIMEOUT !
ethernet@e000b000: No link.
ping failed; host 169.254.0.2 is not alive

Is this method for getting the loopback test results correct? 

No matter which test I set on the registers (near-end, far-end, mii loopback or analog loopback), pinging never works, neither from the u-boot environment or the link partner. So I guess I am doing something bad, but not sure if it's the pinging step or something else. 

Shortly: I am able to write the registers but I am not sure about how to get the results from the loopback tests.

Any suggestion would be more than appreciated!

Thanks in advance!

  • Hi,

    It appears that you are disabling auto-negotiation in your loopback register commands to the PHY. This could be why you are seeing PHY auto-negotiation timing out. In addition, from your normal operation setup, there seems to be an issue with either your MAC interface, or the link partner's MAC interface. To check for successful ping from a hardware standpoint, a PHY's MII and MDI connection must be operational, while the PHY's Link Partner's MII connection must also be working. The fact that the PHY is able to auto-negotiate and complete link eliminate the MDI connection as a suspect.

    Sincerely,

    Gerome

  • Hello Gerome, 

    Okay, so register 0x0 should be written to 0x1140 to activate the auto-negotiation. Thanks! So, I assume that pinging myself it's the correct way of getting those results, right?

    I cannot perform either the far-end or near-end loopback, and since my link partner it's a commercial embedded computer, probably the issue is related to the custom board's schematics or the mii of the FPGA part.

    I will check that. Anyway, is there something else you can suggest me to check? Any register that is worth checking to figure out where the problem can be?

    Been working long on that and do not know yet exactly what I can do 

    Thanks Slight smile

  • Hi,

    I would suggest looking at the RGMII traces between PHY and MAC to see if there is some mismatch. Section 9.2.2.1.1 has some insight into RGMII layout guidelines. I would also suggest altering Reg 0x86 as needed to counter any mismatch.

    Sincerely,

    Gerome

  • Hello again,

    Sorry for the late response. 

    Checking the rgmii layout guidelines, everything seems to be ok. Moreover, the traces have almost the same length (~47.3X millimeters, differing in the X term, so less than 2 inches). 

    About the skew, the value suitable for my design is 2ns (0x0077 on reg 0x0086). I have try all the combinations around this value, but nothing changed (on reg 0x0086 tried: 0x0077, 0x0067, 0x0068, 0x0066, 0x0076, 0x0077, 0x0078, 0x0086, 0x0087 and 0x0088)

    I have also studied how the ping command for linux works, and it seems that pinging my IP keeps the loop inside the MAC. So I have not been checking the loopback results correctly. How can I check, then, the loopback results? I went through all the registers on the datasheet but can not find any register storing those results. 

    I tried generating PRBS packets inside the PHY, but this won't solve my doubts about where is the problem, so I need to check the results sending packets from the MAC to the physical and digital layer of the PHY.

    Also, I cannot understand why I need the auto-negotiation on if I try to do a digital loopback. In all the datasheets it says it needs to be turned off for this kind of loopback, and for me, it is what makes more sense since I do not want it to connect to the other end. Why do I need it enabled?

    Thanks.

  • Hello,

    Gerome is currently on vacation. Please expect a response later this week. Thank you for your understanding.

    Sincerely,

    David

  • Hello,

    If you would like to test out the loopback of the PHY, I would recommend a traffic generator/checker test. This test is intended to send traffic out through the signal chain and get looped back to the initial device somehow in order to check for any packet corruption and/or absence which would indicate issues. Usually MACs have built-in packet generators and checkers, so I would advise checking with the MAC manufacturer (Xilinx I believe in this case) on how to enable this functionality. The packets will come from the MAC to the PHY via RGMII, and will get looped back by the PHY (MII, PCS, Digital, Analog, or External loopback enabled) and come back up the chain to the MAC. There would be no need for the link partner to be connected in this test case. 

    Sincerely,

    Gerome 

  • Hello,

    Due to time constraints and the not-fixed difficulties explained before, we decided to work with other PHY manufacturers for our systems. Thanks a lot for the support!

    Hopefully, I would come back with another thread, It has left a bad taste not being able to make the ethernet work correctly.

    Regards.