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DS90UH929-Q1: to ensure re-connectivity of I / F ports

Genius 4710 points
Part Number: DS90UH929-Q1
Other Parts Discussed in Thread: USB2ANY

In current customer products, to ensure re-connectivity of I / F ports, It is supported by performing sequence control A and B between H/U (A-IVI board) and HDMI JACK board.

(All A-IVI handles and controls the register value)

DS90UH929-Q1 is in the HDMI JACK side.

On the other hand, the customer thinks that there is a way to control the register value by adding a microcomputer + EEPROM to the HDMI JACK side.

Our customer develops only HDMI JACK board.

Would you please provide a reference circuit and IC P/N number (microcomputer + EEPROM) that can be used as a reference in this case?

Regards,

Kura

  • Hi Kura, 

    I don't follow the question. What will the MCU and EEPROM be used for, just update a register value? 

    We can't really make part recommendations here since it's a bit outside the scope of our device, many unknown requirements, etc. From DS90UH929-Q1 perspective, registers values are only controlled by an I2C transaction; there are many off-the-shelf MCUs and EEPROMs that can achieve this. 

    Regards, 

    Logan

  • Logan-san

    Thank you for your support.

    https://www.ti.com/lit/ds/symlink/ds90uh929-q1.pdf

    Please let us know about Figure 29. Initialization Sequencing.

    MSP430F5529IPN is on DS90Ux929-Q1EVM.

    https://www.ti.com/jp/lit/ug/snlu172/snlu172.pdf

    Does this Microcontroller support Sequence A and Sequence B in this EVM?

    Regards,

    Kura

  • Hi Kura, 

    The EVM relies on I2C transactions through the USB2ANY (which that MCU is acting as). 

    Is there not any I2C communication between the HDMI JACK board with the DS90Ux929 and the HU board that has the processor/SoC on it? Otherwise, how will the 929 get programmed? 

    I would need a full block diagram to comment further. But typically there will already be I2C host controller that communicates with the 929?

    If not, like I mentioned last time, all that is needed to execute sequence A and sequence B (applying reset after TMDS clock as stabilized) is I2C transactions from an any MCU/host device.

    Regards, 

    Logan