Hi team.
In my customer's design, OUTx pin has a pull up to VDD because their system is DRP. Some time it's UFP. And they are using the signal as a trigger of a discrete logic circuit.
They want to know the state of OUTx in DFP of DRP mode. Please give me your advice.
And, I want a reference design information which is using DRP without battery charging, without PD.
Is there any good and simple reference design?
Regards,
