• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Subscribers 33 subscribers
  • Views 367 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PCA9546A: I2C mux application consulting

Sam Tsai
Prodigy 10 points
Part Number: PCA9546A

Dear Sirs:

There is one question about I2C mux application, would like to clarify that, on our product, applied for 2 cases situation, as below show situation1 & situation2.

 

For situation1, discovered symptom when try enable all channels “ON” to PCA9544 devices in the same time, if n counts >=4, try to scan this bus will appear BMC hang or some of devices missed.

For situation2, also try enable all channels “ON” in the same time, in this moment, BMC will hang.

 

Above 2 situations, if channel counts less, seems won't appear hang symptom!

So, question for I2C mux application, multiple devices cascade or parallel connection topology, enable all channels “ON” in the same time then do access is this appropriated/suggested usage? We guess that seems channel counts or capacitive effect limitation, but not sure!

We access mux each channel by sequentially,  seems didn't any problems but enable channels "ON" in the same time then access, will appear hang problems, either cascade or parallel situations, are there any limited when I2C mux usage?

 

Thanks

Sam.T

  • 0
    Guru 317080 points

    I guess there is too much current through the pull-up resistors. All enabled channels are connected directly, so all their pull-up resistors act in parallel.

    What values are you using?

    On all channels that have no I²C master, the pull-up resistors are needed only when the channel is idle, so you can make them much weaker (10K or larger).

  • 0 in reply to Clemens Ladisch
    TI__Genius 15345 points

    I agree with Clemens. Can we see a schematic of your set up? Not only is your resistance going to add in parallel but so will your capacitance. This will make your resistance much stronger and your devices will have a harder time pulling low. The capacitance will only increase in parallel so you have to make sure you are not exceeding the maximum bus capacitance for your speed.

    The most optimal setup for the lowest bus capacitance and weakest pull up resistance would be to enable one channel at a time whenever you want to access that specific channel. It seems that you have found a sweet spot for an appropriate amount of channels you can access at one time.

    Best,

    Chris

  • 0
    Prodigy 10 points

    Hello Clemens, Chris:

    Thanks for recommendations.

    I attached more detail schematic for reference, PU resistors on  I2C mux is 1K-ohm.

    For the resistor value, can try to increase value to see if improvement but how to judge the total capacitance on bus which meet spec or not?

    Thanks

    Sam.T

    Ref_SCH_for_I2C_Mux_Application_Consulting.pdf

  • +1 in reply to Sam Tsai
    TI__Genius 15345 points

    Hi Sam,

    1K pull ups are very strong. We have a app note that goes over how to size pull up resistors. You can definitely increase the resistance of those PUs.

    When it comes to capacitance there are a couple things that will change your bus capacitance. Every device on the I2C bus has it's own capacitance that it adds. You can find this value in the datasheet. This will probably be the most significant factor to your bus capacitance. The trace width and length of your I2C bus also adds capacitance especially as it becomes very long. The same goes for any cabling that you might use on the I2C bus. Overall, you will know if your bus capacitance is too high if you can no longer meet the I2C spec for rise time for your speed.

    Best,

    Chris