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DS250DF410EVM: PRBS Generator

Daniel Kornilin
Prodigy 10 points
Part Number: DS250DF410EVM
Other Parts Discussed in Thread: DS250DF410

Hello, I'm trying to understand the relation between the clock frequency (that's provided externally through RX0N and RX0P) and the PRBS data rate.

For example, what should be the supplied clock frequency in order to achieve a PRBS11 with 20 Gpbs data rate.

Thank you. 

  • 0
    TI__Mastermind 19165 points

    There's no connection. The 25MHz calibration clock does not feed into the high-speed data path; it merely serves a a timing reference for the digital logic. The retimer implements a clock-less CDR architecture i.e. the clock is recovered from the data then used for retiming. You can use the same 25MHz calibration clock frequency for all data rates. The user simply needs to configure the CDR to lock to a specific data rate via the SMBus channel registers. Refer to the datasheet for the details.

    Regards,

    Rodrigo Natal

  • 0 in reply to Rodrigo Natal
    Prodigy 10 points

    Hello Rodrigo, thank you for the answer.

    I wasn't talking about the 25 MHz calibration clock (that is connected to CAL_CLK_IN) but rather I'm referring to the high-speed RX0P and RX0N pins.

    If for example there's a 500MHz clock that is connected to pin RX0P what would it mean for the PRBS generator?

    Thanks.

  • 0 in reply to Daniel Kornilin
    TI__Mastermind 19165 points

    The TI retimer by default assumes "divide by 1" setting. The TI retimer only supports divide by 1,2, and 4 rates for standard encoded data but it can support data rate down to divide by 16 if input data is 1010 clock pattern. 

    500MHz is too low a frequency. It corresponds to an 8T pattern for 16Gbps. 16Gbps is outside of the range that the CDR can lock to.

    Below for reference is the data rate ranges that the DS250DF410 supports in retimed mode.

    • The lowest full data rate listed on this table is 20.2752Gbps
      • Divide by 16 of this rate is 1.2672Gbps. A clock signal at this rate is equivalent to a 633.6MHz sinusoid
      • If the user set the retimer CDR rate for 20.2752Gbps via channel registers 0x60 thru 0x63 and enabled the PRBS generator per the programming guide, the retimer should be able to CDR lock to 633.6MHz input sinusoid then output 20.2752Gbps PRBS data

    Thanks,

    Rodrigo Natal