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Maximizing RS485 performance with SN65HVD21

Other Parts Discussed in Thread: SN65HVD21

Interface team,

I have a customer exploring different options to maximize the # of nodes, length, and speed of a 485 line.  Can you help to answer their questions below?

1) I’ve been looking at available RS485 transceivers and realize that there may not be a part that meets all of the requirements.  It looks like the SN65HVD21 may be a good compromise, with us operating around 100 to 255 nodes across 255 feet of cable at 5Mbps.  We may be able to lower our supply voltage to less than the 27V max rating of the part.  Are there any other suggetions?

 

2) Do you think we will be able to obtain 5Mbps over 255 feet of cable when connecting that many nodes along the bus?  My concern is the input capacitance of each transceiver on the bus degrading the signal.  Our system architecture may only need one receiver enabled at any given time using a TDMA approach, so we can disable the rest of the receivers on the bus. 

3) Would disabling the driver and receiver on the RS485 transceiver reduce the differential capacitance that the bus is exposed to?

Thanks,

Tom 

  • Hi Tom,

    you are spot on when choosing one of the high common-mode voltage devices of the HVD2x family. I have attached the data sheet of the entire family. On the front page, bottom left you can see the various data rate versus frequency plots. Your application still lies before the rolloff of the HVD21. Note that 1m ~ 3 feet. So that the rolloff, occurring at 5Mbps and 150m to 200m, should cover 450 ft to 600 ft.

    Note that the supply voltage of these devices is 5V. The +/- 27V represent the maximum tolerable bus voltages at the A and B terminals. Such high voltages can occur when the potential differences between the driver ground and the ground of a remote located receiver differ largely.

    Another misconception is that many designer believe, disabling a transceiver would reduce its bus capacitance. This is NOT the case. The high impedance inputs of a disabled receiver still present an input capacitance. So doe the parasitic drain-source capacitances of the high-impedance output FETs of a disabled driver.

    So continue with the HVD21. Should larger data rates be required have a look at the HVD23, or for larger distances consider the HVD24. These devices possess an equalizer at the reciver input which boosts the bus signal after traversing a long distance link.

    A final note is on jitter. The diagrams on the front page include, I believe, a 5% jitter, that is the eye diagram is fairly wide open. For smaller eye opening, or larger jitter, the distance can be extended.

    Below I include a cable length versus data rate diagram for an old TL3659 transceiver. As you can see, allowing for larger jitter can extend the reach of a data link significantly.

    Now good luck with your design.            

    Best regards, Thomas

     

    SN65HVD2x.pdf