Regarding FrameSync configurations based on the Deserializer ub962 and Serializer ub953 Datasheets:
I have the following understanding:
- If DeSer 962 and Ser 953 (in camera) are in Synchronous mode, then FrameSync is directly dependent on the REFCLK of the DeSer. That means,
- No need to configure the registers in TI 962 (i.e., 0x18, 19, 1A, 1B, 1C) >> Leave them as default
- Need to configure Serializer GPIOs as outputs
- FrameSync is automatically taken cared by the Synchronous mode configuration
- If DeSer 962 and Ser 953 are operating in Non-Synchronous mode,
- Better to use internally generated frame sync (configuration is simpler)
- Configure all registers in TI 962 (0x18, 0x19, 0x1A, 0x1B, 0x1C) as indicated in the 962 datasheet
- Configure Serializer GPIOs as outputs
Please confirm if I have the correct understanding between both cases mentioned above. Are there anything else to consider when configuring frame_sync?