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DS110DF410: Reg 0xFF programming issue.

Part Number: DS110DF410

Hi ,

One of my customer is not  able to program required values for reg 0xff (other than 0x0), value remains in 0xA5 even after i2c write with diff values

Kindly check and pls let us know what we are missing. We can also have a short call to go over this issue.

We are referring “DS110DF410 SNLS397D” data sheet.

 

[vrf:none] root@hwxacs1-7030-re0:~# i2cget -y 0 0x18 0xff

0xa5

[vrf:none] root@hwxacs1-7030-re0:~# i2cset -y 0 0x18 0xff 0x0

[vrf:none] root@hwxacs1-7030-re0:~# i2cget -y 0 0x18 0xff

0x00

[vrf:none] root@hwxacs1-7030-re0:~# i2cset -y 0 0x18 0xff 0x04    //read & writes target channel 0 register set

[vrf:none] root@hwxacs1-7030-re0:~#

[vrf:none] root@hwxacs1-7030-re0:~# i2cget -y 0 0x18 0xff

0xa5

[vrf:none] root@hwxacs1-7030-re0:~# i2cset -y 0 0x18 0xff 0x05. // read & writes target channel 1 register set

[vrf:none] root@hwxacs1-7030-re0:~# i2cget -y 0 0x18 0xff

0xa5

[vrf:none] root@hwxacs1-7030-re0:~# i2cset -y 0 0x18 0xff 0x06. // channel 2

[vrf:none] root@hwxacs1-7030-re0:~# i2cget -y 0 0x18 0xff

0xa5

[vrf:none] root@hwxacs1-7030-re0:~# i2cset -y 0 0x18 0xff 0x07

[vrf:none] root@hwxacs1-7030-re0:~# i2cget -y 0 0x18 0xff

0xa5

[vrf:none] root@hwxacs1-7030-re0:~#

  • Hi Dilip,

    This is definitely unexpected behavior.  Which SMBus mode is the retimer set to?  If you read back shared register 0x00, does this match up with the address the device is set to?

    Thanks,
    Drew

  • Hi Drew, 

    Thanks for looking at this issue. Retimer is set to SMBus slave mode(set to EN_SMB = High).  Shared register 0x00 value matches correctly with the address

    [vrf:none] root@hwxacs1-7030-re0:~# i2cget -y 0 0x18 0xff // selected shared registers
    0x00

    [vrf:none] root@hwxacs1-7030-re0:~# i2cget -y 0 0x18 0x00  //SMBus_Addr[3:0] is b'0000 
    0x00

    so, 7-bit SMBus address is 0x18.

    channel select bits of register 0xff (bit 1:0) are not changing. LSB bits are set to 0x5 or 0x0 (bit 3:0).

    Please also let us know a way to check signal detect(SD) ? any registers we can read?

    //shared registers dump

    [vrf:none] root@hwxacs1-7030-re0:~# i2cdump -y 0 0x18
    No size specified (using byte-data access)
    0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
    00: 00 f0 00 00 01 0e 00 04 00 00 00 00 00 00 00 00 .?..??.?........
    10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    [vrf:none] root@hwxacs1-7030-re0:~#

    //channel  registers dump

    [vrf:none] root@hwxacs1-7030-re0:~# i2cset -y 0 0x18 0xff 0x04
    [vrf:none] root@hwxacs1-7030-re0:~# i2cget -y 0 0x18 0xff
    0xa5
    [vrf:none] root@hwxacs1-7030-re0:~# i2cdump -y 0 0x18
    No size specified (using byte-data access)
    0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
    00: 00 01 00 a5 00 00 00 00 00 00 10 0f 08 00 93 69 .?.?......???.?i
    10: 3a 20 a0 30 00 10 7a 36 40 23 00 03 24 00 fe 55 : ?0.?z6@#.?$.?U
    20: 00 00 00 40 40 00 00 00 00 00 30 00 72 80 00 06 ...@@.....0.r?.?
    30: 00 20 11 88 3f 1f 31 00 00 00 a5 00 00 00 80 00 . ????1...?...?.
    40: 00 01 04 10 40 08 02 80 03 0c 30 41 50 c0 60 90 .???@?????0AP?`?
    50: 88 82 a0 46 52 8c b0 c8 57 5d 69 75 d5 99 96 a5 ???FR???W]iu????
    60: 00 00 00 00 00 00 00 20 00 0a 44 00 00 00 00 00 ....... .?D.....
    70: 03 20 00 00 00 00 b0 c8 57 5d 69 75 d5 99 96 a5 ? ....??W]iu????
    80: 00 01 04 10 40 08 02 80 03 0c 30 41 50 c0 60 90 .???@?????0AP?`?
    90: 88 82 a0 46 52 8c b0 c8 57 5d 69 75 d5 99 96 a5 ???FR???W]iu????
    a0: 00 01 04 10 40 08 02 80 03 0c 30 41 50 c0 60 90 .???@?????0AP?`?
    b0: 88 82 a0 46 52 8c b0 c8 57 5d 69 75 d5 99 96 a5 ???FR???W]iu????
    c0: 00 01 04 10 40 08 02 80 03 0c 30 41 50 c0 60 90 .???@?????0AP?`?
    d0: 88 82 a0 46 52 8c b0 c8 57 5d 69 75 d5 99 96 a5 ???FR???W]iu????
    e0: 00 01 04 10 40 08 02 80 03 0c 30 41 50 c0 60 90 .???@?????0AP?`?
    f0: 88 82 a0 46 52 8c b0 c8 57 5d 69 75 d5 99 96 a5 ???FR???W]iu????
    [vrf:none] root@hwxacs1-7030-re0:~#

    thanks

    Pradeep

  • Hi Pradeep,

    Thanks for sharing the register dump.  It's interesting that the channel register dump seems to have repeating data.  This can be seen in the "99 96 a5" string.  This also corresponds to the default values for registers 5D-5F.  This is definitely unusual behavior.  Can you share a scope capture of the I2C lines while reading address 0xFF while it is set to 0x00 and a value that results in 0xA5?

    Is this issue happening on just one device or several devices?

    Thanks,
    Drew

  • Hi Drew, 

    I have requested our HW engineer to probe and capture the data, will share it soon. This issue is observed on other box as well(attached the output below).

    Is there any registers we can read to know signal detect ?

    [vrf:none] root@hw-con7-6035-re0:~# i2cget -y 0 0x18 0xff
    0x00
    [vrf:none] root@hw-con7-6035-re0:~# i2cset -y 0 0x18 0xff 0x4
    [vrf:none] root@hw-con7-6035-re0:~# i2cget -y 0 0x18 0xff
    0xa5
    [vrf:none] root@hw-con7-6035-re0:~# i2cset -y 0 0x18 0xff 0x5
    [vrf:none] root@hw-con7-6035-re0:~# i2cget -y 0 0x18 0xff
    0xa5
    [vrf:none] root@hw-con7-6035-re0:~# i2cset -y 0 0x18 0xff 0x6
    [vrf:none] root@hw-con7-6035-re0:~# i2cget -y 0 0x18 0xff
    0xa5
    [vrf:none] root@hw-con7-6035-re0:~# i2cset -y 0 0x18 0xff 0x7
    [vrf:none] root@hw-con7-6035-re0:~# i2cget -y 0 0x18 0xff
    0xa5
    [vrf:none] root@hw-con7-6035-re0:~# i2cset -y 0 0x18 0xff 0x0
    [vrf:none] root@hw-con7-6035-re0:~# i2cget -y 0 0x18 0xff
    0x00
    [vrf:none] root@hw-con7-6035-re0:~# i2cset -y 0 0x18 0xff 0x6
    [vrf:none] root@hw-con7-6035-re0:~# i2cget -y 0 0x18 0xff
    0xa5

    thanks

    Pradeep

  • Hi Drew,

    I have attached waveform for different offset reading. Both for write and read operation as well. Each operation details are mentioned in the file name itself.

    Offset 0x0 is not showing SMBus address. Also, device ID 0x1 shows value 0xf0. Please check and confirm if this valid read. I did not find device ID in the datasheet.

    TI-Mux-DS110-Debug.zip

  • Hi Pradeep and Murali,

    Thanks for sharing the waveforms.  I didn't observe anything out of the ordinary when looking over them.

    Regarding signal detect, on the DS110DF410, there is not a register which directly reports signal detect status, but there is a signal detect loss indicator.  This is channel registers 0x01[0].  This bit is set once signal is acquired and then lost.

    Can you confirm that READ_EN is tied low in your implementation?

    Thanks,
    Drew

  • Hi Drew,

    We tried READ_EN is tied low and tried the same. I don't see any difference. But I understand from the datasheet for SMBus slave mode this strap needs to be low.

  • Hi Murali,

    I will try to get a register dump from a DS110DF410 to see if registers 0x76-0xFE match your registers dump.

    With that said, this still seems like really strange behavior.  Are there any additional system details you can share?  You mentioned this is happening on another system.  Is this happening on all systems, or are just some systems exhibiting this behavior?

    Thanks,
    Drew

  • Hi Drew,

    One good news we are able to make DS110DF410 up for our application and its working fine for us. Channel selection is working. But we see discrepancy with only  0xFF register it always shows 0xA5 when we select the any channel. Perhaps this one can check and verify why it is behaving this way in your eval board.

  • Hi Murali,

    I confirmed on an eval board that it behaves as you have described.  With that said, based on testing I performed on the eval boards, it appears that the appropriate channel registers are selected when a write to 0xFF is made.  I would recommend avoiding RMW operations to register 0xFF and instead just overwrite 0xFF contents.

    Thanks,

    Drew