The programming guide only mentions how to get the data rate mode(12G/6G/3G/HD/SD).
I would like to know if there is a way to know if the LMH1297 has locked at 1/1
or 1/1.001 for each data rate.
I'm using the LMH1297 as a front end to Xilinx Kintex-7 FPGA.
The Kintex-7 receiver has a permissible fluctuation in data rate of ±200ppm with
respect to the reference clock in the 12G-SDI frequency band. Therefore, it is
necessary to switch the reference clock between data frequencies of 1/1 and 1/1.001.
For this reason, it would be helpful if the LMH1297 had a register to know the data
frequency being received.
