LMH0340: 5-Bit DDR LVDS design support.

Hello Everyone,

Our application is a MIPI to SDI bridge. We are trying to leverage a Lattice semiconductor reference design that converts MIPI to OpenLDI LVDS:

https://www.latticesemi.com/Products/DesignSoftwareAndIP/IntellectualProperty/ReferenceDesigns/ReferenceDesign03/MIPIDSICSI2OpenLDILVDS 

The only wrinkle with this plan is the formatting of the LVDS isn't in the 5-bit DDR format that is required by the LMH0340. As such, we are looking for documentation on the 5-bit DDR requirements and/or reference code that we can port into the lattice FPGA (LIFCL-40-9BG400C).

I've located the reference IP that TI has generated – might I request access to the Xilinx version?

https://www.ti.com/tool/BROADCAST_VIDEO_SERDES_IP 

Likewise, is there documentation that details the requirements for the 5-bit DDR LVDS so we may determine if we can suitably port to the Lattice target?

Lastly, if TI has an alternate way of converting MIPI to SDI (with cable driver), we're open to suggestions.

Thank you in advance,

Iain