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XIO2001: Behavior on case of less than 100msec from /GRST_deassertion to /PERST_deassertion

Part Number: XIO2001

Hi,

My customer has one question.  He is making PCIe daughter card connected with PC.

According to the PCIe specification, /PERST is high after minimum 100ms from 3.3V power-up of PC's mother board.  However, his daughter card with XIO2001 has power-supply IC and some delay is occurred.  As the result, it is possible to take less than 100ms from /GRST_deassertion to /PERST_deassertion, depend on PC mother board.

On the other hands, XIO2001 datasheet P.21 is described as follows:

Wait a minimum of 100 ms after applying power. The 100-ms limit satisfies the requirement for stable power by the deassertion of PERST.

On the case of less than 100ms between /GRST_deassertion and /PERST_deassertion, how about XIO2001 operation?  Does XIO2001 has any issue?

My understanding, if power is stable, there is no issue under this case.  Is it correct?  I want to confirm it.

Thanks and best regards,
M.HATTORI.

  • Hi M.HATTORI,

    As you said, the 100ms delay is specified in the datasheet.  If the XIO2001 is used with a daughter card that is not compliant, then the XIO2001 might work, but we cannot guarantee that it operates the way it's described in the datasheet.  The validation and testing of the XIO2001 was done under this condition, and we do not have data for other test conditions.  It does imply in the datasheet that the 100ms wait time is mainly for stable power, so maybe it will still work; the only way to know for sure is to test it.

    The power is not the only concern, the PCIe device also needs time to lock onto the PCIe REFCLK signal, so make sure that is also available >100us before the deassertion of /PERST.

    Regards,

    Nicholaus