Hi,
I am re-editing my PCB and schematic, mainly due to a stock problem of TI's DC2DC components, and I also want to improve the PCB layout in this case, since I have about 15% of boards that do not work/recognize on the PC. My circuit contains XIO2001 which is connected to two FPGAs used as PCI0 and PCI1. All of them are on the same board.
I would like to clarify few topics:
1- The length of CLK0&1 traces is about 1840 mil. The length of CLK-CLK6OUT is 1940 mil, is this OK?
2- According to the data sheets, the current consumption, for two channels, from the 1.5V voltage, is about 300mA, I am using the TPS82672SIPT DC2DC for this purpose. It's OK?
3- There are three reference designs for the XIO2001: in the product page RevB, in the “XIO2001 Implementation Guide” - RevD, and in the support and RevC which is incorrect because that the 1.5PLL is not filtered and connected directly to the digital 1.5V, even though this is the revision of the EVAL board that I have. What is the best reference design to use? What are the difference between Rev B and Rev D?
Thanks!
Yossy Goldenberg
