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TCAN11623-Q1: Clear Understand or Hirarchy to Be followed to Make the Chip sleep and Wake up

Part Number: TCAN11623-Q1

Hello Team,

We want to know the Hirarchy or Step By Step process that shoudl be followed to have a Safe and Perfect Sleep and Wake up

As this is a Bit confusing to work out the Information from the Datasheet when using nSLP

Thanks in Advance for your Prompt Response !

Regards

  • Hi Rakesh, 

    Thanks for bringing your question to E2E!

    I'm not sure I fully understand your question here, but I will try to describe the typical process for mode management with TCAN11623.

    When active and in normal mode, the MCU will be powered by the SBC's LDO output (or some other supply that is controlled by the INH signal from the SBC). When the system is ready to move into a low power state, the MCU can drive the nSLP signal low. This will cause SBC to transition into standby mode for tSLP and then to sleep mode. At this point, the LDO output turns off (as does the INH signal) and the MCU becomes completely unpowered. The SBC now monitors the CAN bus and WAKE pin for a wake up event. When a WUP is recognized on the CAN bus or an edge is detected on the WAKE pin, the SBC will move to standby mode through reset mode (this is to cause the nRST line to pulse low to reset any connected peripherals). Once in standby mode, the SBC's LDO is active (as is the INH signal) so the MCU becomes powered again. After running any startup routines, the MCU can drive the nSLP pin high to move the SBC to normal mode to activate the CAN transceiver so that it may interface with the CAN bus. 

    Let me know if this sequence makes sense or if any part of the sleep/wake process is still unclear.

    Regards, 
    Eric Schott